Sonochan II 0.1

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cs2200.h
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1
13 #ifndef _CS2200_H_
14 #define _CS2200_H_
15
16 //===========================| Included libraries |============================
17 /* HAL for PLL !!! Please include correct driver for used architecture!
18 * Also in included driver should be defined enumeration cs2200_status_t
19 */
20 #include "cs2200_HAL_AVR32_UC3A3_HW_interface.h"
21
22 //=================================| Options |=================================
47 #define CS2200_REF_CLK_FREQ 12000000UL
48
55 #define CS2200_SUPPORT_GENERIC_DRIVER 1
56
58
70 #define CS2200_SUPPORT_RTOS 1
71
82 #define CS2200_RTOS_CREATE_MUTEX 1
83
85
86
87 //===============================| Structures |================================
88
95 typedef enum{
96 CS2200_INPUT_DIVIDER_1x = 2,
97 CS2200_INPUT_DIVIDER_2x = 1,
98 CS2200_INPUT_DIVIDER_4x = 0
99 } cs2200_in_div_t;
100
107 typedef enum{
108 CS2200_R_MOD__MUL_1x = 0,
109 CS2200_R_MOD__MUL_2x = 1,
110 CS2200_R_MOD__MUL_4x = 2,
111 CS2200_R_MOD__MUL_8x = 3,
112 CS2200_R_MOD__DIV_2x = 4,
113 CS2200_R_MOD__DIV_4x = 5,
114 CS2200_R_MOD__DIV_8x = 6,
115 CS2200_R_MOD__DIV_16x= 7
116 } cs2200_r_mod_t;
117
121 typedef union{
122 uint32_t i_32bit;
123 uint8_t i_8bit[4];
124 } cs2200_32b_to_8b_t;
125
126
134 // Note, that this is endian (and compiler) dependent. So at least try...
135 #if defined(__ORDER_BIG_ENDIAN__) || defined(__AVR32__)
136 typedef struct device_id
137 {
138 uint8_t Device :5; // MSB
139 uint8_t Revision :3;
140 }device_id_t;
141
142 typedef struct device_Ctrl_t
143 {
144 uint8_t Unlock :1;
145 uint8_t :5; // 5 Reserved bits - blank space
146 uint8_t AuxOutDis :1;
147 uint8_t ClkOutDis :1;
148 } device_ctrl_t;
149
150 typedef struct device_Cfg_1_t
151 {
152 uint8_t RModSel :3;
153 uint8_t :2; // Space
154 uint8_t AuxOutSrc :2;
155 uint8_t EnDevCfg1 :1;
156
157 } device_Cfg_1_t;
158
159 typedef struct global_Cfg_t
160 {
161 uint8_t :4; // Space
162 uint8_t Freeze :1;
163 uint8_t :2; // Space
164 uint8_t EnDevCfg2 :1;
165 } global_Cfg_t;
166
167 typedef struct func_Cfg_1_t
168 {
169 uint8_t :1; // Space
170 uint8_t AuxLockCfg :1;
171 uint8_t :1; // Space
172 uint8_t RefClkDiv :2;
173 uint8_t :3; // Space
174 } func_Cfg_1_t;
175
176 typedef struct func_Cfg_2_t
177 {
178 uint8_t :3; // Space
179 uint8_t ClkOutUnl :1;
180 uint8_t :4; // Space
181 } func_Cfg_2_t;
182 #else // Little Endian
183 typedef struct device_id
184 {
185 uint8_t Revision :3; // LSB
186 uint8_t Device :5;
187 }device_id_t;
188
189 typedef struct device_Ctrl_t
190 {
191 uint8_t ClkOutDis :1;
192 uint8_t AuxOutDis :1;
193 uint8_t :5; // 5 Reserved bits - blank space
194 uint8_t Unlock :1;
195 } device_ctrl_t;
196
197 typedef struct device_Cfg_1_t
198 {
199 uint8_t EnDevCfg1 :1;
200 uint8_t AuxOutSrc :2;
201 uint8_t :2; // Space
202 uint8_t RModSel :3;
203
204 } device_Cfg_1_t;
205
206 typedef struct global_Cfg_t
207 {
208 uint8_t EnDevCfg2 :1;
209 uint8_t :2; // Space
210 uint8_t Freeze :1;
211 uint8_t :4; // Space
212 } global_Cfg_t;
213
214 typedef struct func_Cfg_1_t
215 {
216 uint8_t :3; // Space
217 uint8_t RefClkDiv :2;
218 uint8_t :1; // Space
219 uint8_t AuxLockCfg :1;
220 uint8_t :1; // Space
221
222 } func_Cfg_1_t;
223
224 typedef struct func_Cfg_2_t
225 {
226 uint8_t :4; // Space
227 uint8_t ClkOutUnl :1;
228 uint8_t :3; // Space
229 } func_Cfg_2_t;
230 #endif
231
232
233
235
236
244 typedef struct{
245 union
246 {
247 uint8_t device_id_reg;
248 device_id_t Device_id;
249 };
250
251 union
252 {
253 uint8_t device_crtl_reg;
254 device_ctrl_t Device_Ctrl;
255 };
256
257 union
258 {
259 uint8_t device_cfg_1_reg;
260 device_Cfg_1_t Device_Cfg_1;
261 };
262
263 union
264 {
265 uint8_t global_cfg_reg;
266 global_Cfg_t Global_Cfg;
267 };
268
269 // A little bit special. used as union, that allow easy operate with bytes
270 cs2200_32b_to_8b_t Ratio;
271
272 union
273 {
274 uint8_t func_cfg_1_reg;
275 func_Cfg_1_t Func_Cfg_1;
276 };
277
278 union
279 {
280 uint8_t func_cfg_2_reg;
281 func_Cfg_2_t Func_Cfg_2;
282 };
283 } cs2200_reg_img_t;
284
285
292 typedef struct{
293 // Frequency as integer value
294 cs2200_32b_to_8b_t i_real_freq;
295
296 // Output divider/multiplier as float
297 float f_out_div_mul;
298
299 /* When frequency is changing, PLL is preset to set PLL_OUT to LOW level
300 * and wait until is locked, because if PLL is not locked, output is
301 * undefined. However if we want change ratio by 1, there is big chance that
302 * PLL output will work as expected. So there is option to override this
303 * default settings only for functions that change ratio by 1.
304 * Options:
305 * 1 - save mode (when PLL is not locked -> low level)
306 * 0 - continuous clock (but PLL output might be undefined)
307 */
308 uint8_t i_save_change_ratio_by_1;
309
310 // Simple access to freeze bit (mainly for generic driver)
311 uint8_t i_freeze_flag;
312 } cs2200_virtual_reg_img_t;
313
314 //===========================| Additional includes |===========================
315 #if CS2200_SUPPORT_GENERIC_DRIVER != 0
316 // If used generic driver, get actual structures
317 #include "generic_driver.h"
318 // Also say compiler, that there exist settings on flash
319 extern const gd_config_struct CS2200_config_table[];
320 // And metadata
321 extern const gd_metadata CS2200_metadata;
322
323 #else
324
329 #ifndef _GENERIC_DRIVER_H_
330 #ifndef GD_RES_CODE_DEFINED
331
332 #define GD_RES_CODE_DEFINED
333 typedef enum{
334 GD_SUCCESS = 0,
335 GD_FAIL = 1,
336 GD_INCORRECT_PARAMETER = 2,
337 GD_INCORRECT_CMD_ID = 3,
338 GD_CMD_ID_NOT_EQUAL_IN_FLASH = 4,
339 GD_INCORRECT_DEVICE_ID = 5
340 } GD_RES_CODE;
341 #endif
342 #endif
343
344 #endif
345
346
347
348 #if CS2200_SUPPORT_RTOS != 0
349 #include "FreeRTOS.h"
350 #include "task.h"
351 #include "queue.h"
352 #include "semphr.h"
353
354 extern xSemaphoreHandle mutexI2C;
355 #endif
356
357 //===============================| Definitions |===============================
365 #define CS2200_REG_DEVICE_ID 0x1
367 #define CS2200_REG_DEVICE_CTRL 0x2
369 #define CS2200_REG_DEVICE_CFG_1 0x3
371 #define CS2200_REG_GLOBAL_CFG 0x5
373
377 #define CS2200_REG_RATIO 0x6
378 #define CS2200_REG_FUNC_CFG_1 0x16
380 #define CS2200_REG_FUNC_CFG_2 0x17
382
384
386 #define CS2200_MAP_AUTO_INC_BIT 7
387
388 //=================================| Macros |==================================
389
397 #if CS2200_SUPPORT_RTOS != 0
398 #define CS2200_LOCK_TWI_MODULE_IF_RTOS \
399 xSemaphoreTake( mutexI2C, portMAX_DELAY );
400 #else
401 #define CS2200_LOCK_TWI_MODULE_IF_RTOS
402 #endif
403
404
405 #if CS2200_SUPPORT_RTOS != 0
406 #define CS2200_UNLOCK_TWI_MODULE_IF_RTOS \
407 xSemaphoreGive( mutexI2C );
408 #else
409 #define CS2200_UNLOCK_TWI_MODULE_IF_RTOS
410 #endif
411
412 //==========================| High level functions |===========================
413 GD_RES_CODE cs2200_init(void);
414
415 GD_RES_CODE cs2200_set_PLL_freq(uint32_t i_freq);
416
417 GD_RES_CODE cs2200_get_PLL_freq(uint32_t *p_i_freq);
418
419 GD_RES_CODE cs2200_inc_PLL_freq(void);
420
421 GD_RES_CODE cs2200_dec_PLL_freq(void);
422
423 GD_RES_CODE cs2200_set_out_divider_multiplier_float(float f_div_mul);
424
425 GD_RES_CODE cs2200_get_out_divider_multiplier_float(float *p_div_mul);
426
427 GD_RES_CODE cs2200_set_out_divider_multiplier(cs2200_r_mod_t e_out_div_mul);
428
429 GD_RES_CODE cs2200_get_out_divider_multiplier(cs2200_r_mod_t *p_e_out_div_mul);
430
431 GD_RES_CODE cs2200_set_save_change_ratio_by_1(uint8_t i_save_change);
432
433 GD_RES_CODE cs2200_get_save_change_ratio_by_1(uint8_t *p_save_change);
434 //===========================| Mid level functions |===========================
435 GD_RES_CODE cs2200_set_ratio(uint32_t i_ratio);
436
437 GD_RES_CODE cs2200_get_ratio(uint32_t *p_i_ratio);
438
439 GD_RES_CODE cs2200_set_freeze_bit(uint8_t i_freeze_flag);
440
441 GD_RES_CODE cs2200_get_freeze_bit(uint8_t *p_i_freeze_flag);
442
443 GD_RES_CODE cs2200_enable_device_cfg(void);
444
445 GD_RES_CODE cs2200_disable_device_cfg(void);
446
447 GD_RES_CODE cs2200_set_in_divider(cs2200_in_div_t e_in_div);
448
449 GD_RES_CODE cs2200_get_in_divider(cs2200_in_div_t *p_e_in_div);
450 //===========================| Low level functions |===========================
451 GD_RES_CODE cs2200_calc_frequency(uint32_t i_ratio, uint32_t *p_i_frequency);
452
453 GD_RES_CODE cs2200_calc_ratio(uint32_t i_frequency, uint32_t *p_i_ratio);
454
455 GD_RES_CODE cs2200_write_data(
456 uint8_t *p_data,
457 uint8_t i_number_of_bytes);
458
459 GD_RES_CODE cs2200_read_data(
460 uint8_t *p_data,
461 uint8_t i_number_of_bytes);
462 #endif