Sonochan II 0.1

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tlv320aic33.h File Reference

Driver for codec TLV320AIC33. More...

`#include "tlv320aic33_HAL_AVR32_UC3A3_HW_interface.h"`
`#include "generic_driver.h"`
`#include "FreeRTOS.h"`
`#include "task.h"`
`#include "queue.h"`
`#include "semphr.h"`

Go to the source code of this file.

## Data Structures
union | p0_r0_Page_Select_t
union | p0_r1_Software_Reset_t
union | p0_r2_Codec_Sample_Rate_Select_t
union | p0_r3_PLL_Programming_A_t
union | p0_r4_PLL_Programming_B_t
union | p0_r5_PLL_Programming_C_t
union | p0_r6_PLL_Programming_D_t
union | p0_r7_Codec_Datapath_Setup_t
union | p0_r8_Audio_Serial_Interface_Control_A_t
union | p0_r9_Audio_Serial_Interface_Control_B_t
union | p0_r10_Audio_Serial_Interface_Control_C_t
union | p0_r11_Audio_Codec_Overflow_Flag_t
union | p0_r12_Audio_Codec_Digital_Filter_Control_t
union | p0_r13_Headset_Button_Press_Detection_A_t
union | p0_r14_Headset_Button_Press_Detection_B_t
union | p0_r15_Left_ADC_PGA_Control_t
union | p0_r16_Right_ADC_PGA_Control_t
union | p0_r17_MIC3L_R_To_Left_ADC_Control_t
union | p0_r18_MIC3L_R_To_Right_ADC_Control_t
union | p0_r19_LINE1LToLeftADCControl_t
union | p0_r20_LINE2L_To_Left_ADC_Control_t
union | p0_r21_LINE1R_To_Left_ADC_Control_t
union | p0_r22_LINE1R_To_Right_ADC_Control_t
union | p0_r23_LINE2R_To_Right_ADC_Control_t
union | p0_r24_LINE1L_To_Right_ADC_Control_t
union | p0_r25_MICBIAS_Control_t
union | p0_r37_DAC_Power_And_Output_Driver_Control_t
union | p0_r38_High_Power_Output_Driver_Control_t
union | p0_r39_Reserved_t
union | p0_r40_High_Power_Output_Stage_Control_t
union | p0_r41_DAC_Output_Switching_Control_t
union | p0_r42_Output_Driver_Pop_Reduction_t
union | p0_r43_Left_DAC_Digital_Volume_Control_t
union | p0_r44_Right_DAC_Digital_Volume_Control_t
union | p0_r47_DAC_L1_To_HPLOUT_Volume_Control_t
union | p0_r51_HPLOUT_Output_Level_Control_t
union | p0_r64_DAC_R1_To_HPROUT_Volume_Control_t
union | p0_r65_HPROUT_Output_Level_Control_t
union | p0_r102_Clock_Generation_Control_t
struct | tlv320aic33_virtual_reg_img_t

## Macros
#define | tlv320aic33_read_byte_ro_mem(p_address) *(p_address)
#define | tlv320aic33_read_word_ro_mem(p_address) *(p_address)
#define | tlv320aic33_read_dword_ro_mem(p_address) *(p_address)
#define | TLV320AIC33_LOCK_TWI_MODULE_IF_RTOS xSemaphoreTake( mutexI2C, portMAX_DELAY );
| Define lock function when support for RTOS is enabled. More...
#define | TLV320AIC33_UNLOCK_TWI_MODULE_IF_RTOS xSemaphoreGive( mutexI2C );
Basic TLV320AIC33 settings
When options are 1 (true) and 0 (false) it is highly recommended use 1 or 0 instead of true and false
#define | TLV320AIC33_SUPPORT_GENERIC_DRIVER 1
| Support for generic driver support. More...
#define | TLV320AIC33_SUPPORT_RTOS 1
| Allow enable FreeRTOS features. More...
#define | TLV320AIC33_RTOS_CREATE_MUTEX 0
| Allow create mutex mutexI2C when TLV320AIC33_init is called. More...

## Enumerations
enum | e_HPLCOMOutputDriverConfigurationControl { HPLCOM_is_differential_of_HPLOUT = 0, HPLCOM_is_constant_VCM = 1, HPLCOM_is_single_ended = 2 }
enum | e_HPRCOMOutputDriverConfigurationControl { HPRCOM_is_differential_of_HPROUT = 0, HPRCOM_is_constant_VCM = 1, HPRCOM_is_single_ended = 2, HPRCOM_is_differential_of_HPLCOM = 3, HPRCOM_is_external_feedback_with_HPLCOM_as_VCM_output = 4 }
enum | e_ShortCorcuitProtectionModeControl { if_short_protect_en_limit_max_current = 0, if_short_protect_en_power_down_when_short = 1 }
enum | e_LeftDACOutputSwitchingControl { left_DAC_output_DAC_L1_path = 0, left_DAC_output_DAC_L3_path = 1, left_DAC_output_DAC_L2_path = 2 }
enum | e_RightDACOutputSwitchingControl { right_DAC_output_DAC_R1_path = 0, right_DAC_output_DAC_R3_path = 1, right_DAC_output_DAC_R2_path = 2 }
enum | e_DACDigitalVolumeControlFunctionality { left_and_right_DAC_channels_independent_volume = 0, left_DAC_channel_follows_right_channel = 1, right_DAC_channel_follows_left_channel = 2 }
enum | e_OutputDriverPowerOnDelayControl { driver_power_on_time_0us = 0, driver_power_on_time_10us = 1, driver_power_on_time_100us = 2, driver_power_on_time_1ms = 3, driver_power_on_time_10ms = 4, driver_power_on_time_50ms = 5, driver_power_on_time_100ms = 6, driver_power_on_time_200ms = 7, driver_power_on_time_400ms = 8, driver_power_on_time_800ms = 9, driver_power_on_time_2s = 10, driver_power_on_time_4s = 11 }
enum | e_DriverRampUpStepTimingControl { driver_ramp_up_step_time_0ms = 0, driver_ramp_up_step_time_1ms = 1, driver_ramp_up_step_time_2ms = 2, driver_ramp_up_step_time_4ms = 3 }
enum | e_WeakOutputCommonModeVoltageControl { common_output_voltage_generated_from_resistor_divider = 0, common_output_voltage_generated_from_bandgap_reference = 1 }
enum | e_HPLOUTPowerDownDriveControl { HPLOUT_is_weakly_driven_to_common_mode_when_pwr_dwn = 0, HPLOUT_is_3_stated_with_pwr_dwn = 1 }
enum | e_HPLOUTVolumeControlStatus { all_programmed_gains_to_HPLOUT_have_been_applied_yet = 0, not_all_programmed_gains_to_HPLOUT_have_been_applied_yet = 1 }
enum | e_HPROUTPowerDownDriveControl { HPROUT_is_weakly_driven_to_common_mode_when_pwr_dwn = 0, HPROUT_is_3_stated_with_pwr_dwn = 1 }
enum | e_HPROUTVolumeControlStatus { all_programmed_gains_to_HPROUT_have_been_applied_yet = 0, not_all_programmed_gains_to_HPROUT_have_been_applied_yet = 1 }
enum | e_CLKDIV_INSourceSelection { CLKDIV_IN_uses_MCLK = 0, CLKDIV_IN_uses_GPIO2 = 1, CLKDIV_IN_uses_BCLK = 2 }
enum | e_PLLCLK_INSourceSelection { PLLCLK_IN_uses_MCLK = 0, PLLCLK_IN_uses_GPIO2 = 1, PLLCLK_IN_uses_BLCK = 2 }
TLV320AIC33_reg_struct Structures for TLV320AIC33 registers
Union is compound from uint8_t value and structure. In uint8_t value are raw data. Structure allow easily set bit by bit without need apply some masks and bit shifts. This make code more clear and also it can save RAM. So structure is for settings bits and uint8_t is for write and read functions. Note that structure can contain more structures or enums. Note Format: p{x}_r{y}_{name} x - page (0, 1) y - register number name - register name
enum | e_FsrefSetting { fsref_48khz = 0, fsref_44_1khz = 1 }
enum | e_ADCDualRateControl { adc_dual_rate_mode_is_disabled = 0, adc_dual_rate_mode_is_enabled = 1 }
enum | e_DACDualRateControl { dac_dual_rate_mode_is_disabled = 0, dac_dual_rate_mode_is_enabled = 1 }
enum | e_LeftDACDatapathControl { left_dac_datapath_is_off = 0, left_dac_datapath_plays_left_channel_input_data = 1, left_dac_datapath_plays_right_channel_input_data = 2, left_dac_datapath_plays_mono_mix_left_and_right_channel_input_data = 3 }
enum | e_RightDACDatapathControl { right_dac_datapath_is_off = 0, right_dac_datapath_plays_right_channel_input_data = 1, right_dac_datapath_plays_left_channel_input_data = 2, right_dac_datapath_plays_mono_mix_left_and_right_channel_input_data = 3 }
enum | e_BitClockDirectionalControl { bit_clock_is_an_input = 0, bit_clock_is_an_output = 1 }
enum | e_WordClockDirectionalControl { word_clock_is_an_input = 0, word_clock_is_an_output = 1 }
enum | e_SerialOutputDataDriver3StateControl { do_not_3state_DOUT_when_valid_data_is_not_being_send = 0, three_state_DOUT_when_valid_data_is_not_being_send = 1 }
enum | e_BitWordClockDriveControl { bit_clk_and_word_clk_not_transmitt_in_master_mode_if_power_dwn = 0, bit_clk_and_word_clk_transmitt_in_master_mode_if_power_dwn = 1 }
enum | e_3DEffectControl { disable_3D_digital_effect = 0, enable_3D_digital_effect = 1 }
enum | e_DigitalMicrophoneFunctionalityControl { digital_mic_support_disabled = 0, digital_mic_support_enabled_oversampling_128 = 1, digital_mic_support_enabled_oversampling_64 = 2, digital_mic_support_enabled_oversampling_32 = 3 }
Page0_reg9 Page 0, register 9 structures and enums
enum | e_AudioSerialDataInterfaceTransferMode { serial_data_bus_uses_I2S_mode = 0, serial_data_bus_uses_DSP_mode = 1, serial_data_bus_uses_right_justified_mode = 2, serial_data_bus_uses_left_justified_mode = 3 }
enum | e_AudioSerialDataWordLengthControl { audio_data_word_length_16bit = 0, audio_data_word_length_20bit = 1, audio_data_word_length_24bit = 2, audio_data_word_length_32bit = 3 }
enum | e_BitClockRateControl { continuous_transfer_mode = 0, clock_256_transfer_mode = 1 }
enum | e_ReSyncMuteBehavior { re_sync_without_soft_muting = 0, re_sync_with_soft_muting = 1 }

## Functions
GD_RES_CODE | tlv320aic33_init (void)
| Initialize TLV320AIC33. More...
GD_RES_CODE | tlv320aic33_set_DAC_play_input_data (uint8_t i_play_stereo)
| Set DAC data path to input data. More...
GD_RES_CODE | tlv320aic33_set_digital_interface_as_master (uint8_t i_master)
| Set digital interface as master or slave. More...
GD_RES_CODE | tlv320aic33_set_data_interface_mode (e_AudioSerialDataInterfaceTransferMode e_mode)
| Set data interface mode. More...
GD_RES_CODE | tlv320aic33_set_word_length (uint8_t i_word_length)
| Set word length. More...
GD_RES_CODE | tlv320aic33_set_DAC_power (uint8_t enable_DACs)
| Enable or disable DACs. More...
GD_RES_CODE | tlv320aic33_set_headphones_single_ended (uint8_t i_single_ended)
| Set headphone COM pins as single ended or differential. More...
GD_RES_CODE | tlv320aic33_set_DAC_mute (uint8_t i_mute_flag)
| Enable or disable mute flag on DAC. More...
GD_RES_CODE | tlv320aic33_set_DAC_volume_dB (float f_volume)
| Set DAC volume. Volume is in dB. More...
GD_RES_CODE | tlv320aic33_set_CLKDIV_IN_source (e_CLKDIV_INSourceSelection e_source)
| Set CLKDIV_IN source. More...
GD_RES_CODE | tlv320aic33_set_PLLCLK_IN_source (e_PLLCLK_INSourceSelection e_source)
| Set PLLCLK_IN source. More...
GD_RES_CODE | tlv320aic33_set_headphones_volume_dB (float f_volume)
| Set headphones volume. Volume is in dB. More...
GD_RES_CODE | tlv320aic33_get_headphones_volume_db (float *p_f_volume)
| Get real headphones volume. More...
GD_RES_CODE | tlv320aic33_reset (void)
| Set page to 0 and restart codec. More...
GD_RES_CODE | tlv320aic33_set_output_driver_power_on_delay (e_OutputDriverPowerOnDelayControl e_delay)
| Set output driver power on delay. More...
GD_RES_CODE | tlv320aic33_set_driver_ramp_up_step_time (e_DriverRampUpStepTimingControl e_time)
| Set driver ramp-up step time. More...
GD_RES_CODE | tlv320aic33_set_DAC_volume (uint8_t i_volume)
| Set DAC volume in raw format. More...
GD_RES_CODE | tlv320aic33_set_headphones_volume (uint8_t i_volume)
| Set headphone volume in raw format. More...
GD_RES_CODE | tlv320aic33_write_data (const uint8_t i_register_number, const uint8_t i_value)
| Write data on TWI (I2C) bus. More...
GD_RES_CODE | tlv320aic33_read_data (uint8_t i_register_number, uint8_t *p_data)
| Read data on TWI (I2C) bus. More...

## Variables
Advanced TLV320AIC33 settings
const gd_config_struct | TLV320AIC33_config_table []
| Configure table for device. More...
const gd_metadata | TLV320AIC33_metadata
xSemaphoreHandle | mutexI2C

## Detailed Description

Driver for codec TLV320AIC33.

Created: 02.04.2014
Modified: 15.05.2014

Version
  0.1a

Author
  Martin Stejskal

## Macro Definition Documentation

#define TLV320AIC33_LOCK_TWI_MODULE_IF_RTOS xSemaphoreTake( mutexI2C, portMAX_DELAY );

Define lock function when support for RTOS is enabled.

If TLV320AIC33_SUPPORT_RTOS is enabled, then there is defined function, that
"lock" TWI device, so any other device can not use it.
If TLV320AIC33_SUPPORT_RTOS is disabled, there is defined just void macro.

#define tlv320aic33_read_byte_ro_mem | ( |  | p_address) |  | *(p_address)

#define tlv320aic33_read_dword_ro_mem | ( |  | p_address) |  | *(p_address)

#define tlv320aic33_read_word_ro_mem | ( |  | p_address) |  | *(p_address)

#define TLV320AIC33_RTOS_CREATE_MUTEX 0

Allow create mutex mutexI2C when TLV320AIC33_init is called.

Mutexes is needed when in RTOS two functions share same hardware. This
option allow create mutex mutexI2C, so any other functions just can use
xSemaphoreTake and xSemaphoreGive functions.
Options: 0 (disabled) or 1 (enabled).

Note
  This option is valid only if RTOS support is enabled.

#define TLV320AIC33_SUPPORT_GENERIC_DRIVER 1

Support for generic driver support.

Options: 1 (support enabled) or 0 (support disabled)

#define TLV320AIC33_SUPPORT_RTOS 1

Allow enable FreeRTOS features.

Options: 0 (disabled) or 1 (enabled). When enabled, then FreeRTOS features
are enabled.

#define TLV320AIC33_UNLOCK_TWI_MODULE_IF_RTOS xSemaphoreGive( mutexI2C );

## Enumeration Type Documentation

enum e_3DEffectControl

Enumerator
disable_3D_digital_effect |
enable_3D_digital_effect |

enum e_ADCDualRateControl

Enumerator
adc_dual_rate_mode_is_disabled |
adc_dual_rate_mode_is_enabled |

enum e_AudioSerialDataInterfaceTransferMode

Enumerator
serial_data_bus_uses_I2S_mode | I2S mode.
serial_data_bus_uses_DSP_mode | DSP mode.
serial_data_bus_uses_right_justified_mode | Right justified mode.
serial_data_bus_uses_left_justified_mode | Left justified mode.

enum e_AudioSerialDataWordLengthControl

Enumerator
audio_data_word_length_16bit |
audio_data_word_length_20bit |
audio_data_word_length_24bit |
audio_data_word_length_32bit |

enum e_BitClockDirectionalControl

Enumerator
bit_clock_is_an_input |
bit_clock_is_an_output |

enum e_BitClockRateControl

Enumerator
continuous_transfer_mode |
clock_256_transfer_mode |

enum e_BitWordClockDriveControl

Enumerator
bit_clk_and_word_clk_not_transmitt_in_master_mode_if_power_dwn |
bit_clk_and_word_clk_transmitt_in_master_mode_if_power_dwn |

enum e_CLKDIV_INSourceSelection

Enumerator
CLKDIV_IN_uses_MCLK |
CLKDIV_IN_uses_GPIO2 |
CLKDIV_IN_uses_BCLK |

enum e_DACDigitalVolumeControlFunctionality

Enumerator
left_and_right_DAC_channels_independent_volume |
left_DAC_channel_follows_right_channel |
right_DAC_channel_follows_left_channel |

enum e_DACDualRateControl

Enumerator
dac_dual_rate_mode_is_disabled |
dac_dual_rate_mode_is_enabled |

enum e_DigitalMicrophoneFunctionalityControl

Enumerator
digital_mic_support_disabled |
digital_mic_support_enabled_oversampling_128 |
digital_mic_support_enabled_oversampling_64 |
digital_mic_support_enabled_oversampling_32 |

enum e_DriverRampUpStepTimingControl

Enumerator
driver_ramp_up_step_time_0ms |
driver_ramp_up_step_time_1ms |
driver_ramp_up_step_time_2ms |
driver_ramp_up_step_time_4ms |

enum e_FsrefSetting

Enumerator
fsref_48khz |
fsref_44_1khz |

enum e_HPLCOMOutputDriverConfigurationControl

Enumerator
HPLCOM_is_differential_of_HPLOUT |
HPLCOM_is_constant_VCM |
HPLCOM_is_single_ended |

enum e_HPLOUTPowerDownDriveControl

Enumerator
HPLOUT_is_weakly_driven_to_common_mode_when_pwr_dwn |
HPLOUT_is_3_stated_with_pwr_dwn |

enum e_HPLOUTVolumeControlStatus

Enumerator
all_programmed_gains_to_HPLOUT_have_been_applied_yet |
not_all_programmed_gains_to_HPLOUT_have_been_applied_yet |

enum e_HPRCOMOutputDriverConfigurationControl

Enumerator
HPRCOM_is_differential_of_HPROUT |
HPRCOM_is_constant_VCM |
HPRCOM_is_single_ended |
HPRCOM_is_differential_of_HPLCOM |
HPRCOM_is_external_feedback_with_HPLCOM_as_VCM_output |

enum e_HPROUTPowerDownDriveControl

Enumerator
HPROUT_is_weakly_driven_to_common_mode_when_pwr_dwn |
HPROUT_is_3_stated_with_pwr_dwn |

enum e_HPROUTVolumeControlStatus

Enumerator
all_programmed_gains_to_HPROUT_have_been_applied_yet |
not_all_programmed_gains_to_HPROUT_have_been_applied_yet |

enum e_LeftDACDatapathControl

Enumerator
left_dac_datapath_is_off |
left_dac_datapath_plays_left_channel_input_data |
left_dac_datapath_plays_right_channel_input_data |
left_dac_datapath_plays_mono_mix_left_and_right_channel_input_data |

enum e_LeftDACOutputSwitchingControl

Enumerator
left_DAC_output_DAC_L1_path |
left_DAC_output_DAC_L3_path |
left_DAC_output_DAC_L2_path |

enum e_OutputDriverPowerOnDelayControl

Enumerator
driver_power_on_time_0us |
driver_power_on_time_10us |
driver_power_on_time_100us |
driver_power_on_time_1ms |
driver_power_on_time_10ms |
driver_power_on_time_50ms |
driver_power_on_time_100ms |
driver_power_on_time_200ms |
driver_power_on_time_400ms |
driver_power_on_time_800ms |
driver_power_on_time_2s |
driver_power_on_time_4s |

enum e_PLLCLK_INSourceSelection

Enumerator
PLLCLK_IN_uses_MCLK |
PLLCLK_IN_uses_GPIO2 |
PLLCLK_IN_uses_BLCK |

enum e_ReSyncMuteBehavior

Enumerator
re_sync_without_soft_muting |
re_sync_with_soft_muting |

enum e_RightDACDatapathControl

Enumerator
right_dac_datapath_is_off |
right_dac_datapath_plays_right_channel_input_data |
right_dac_datapath_plays_left_channel_input_data |
right_dac_datapath_plays_mono_mix_left_and_right_channel_input_data |

enum e_RightDACOutputSwitchingControl

Enumerator
right_DAC_output_DAC_R1_path |
right_DAC_output_DAC_R3_path |
right_DAC_output_DAC_R2_path |

enum e_SerialOutputDataDriver3StateControl

Enumerator
do_not_3state_DOUT_when_valid_data_is_not_being_send |
three_state_DOUT_when_valid_data_is_not_being_send |

enum e_ShortCorcuitProtectionModeControl

Enumerator
if_short_protect_en_limit_max_current |
if_short_protect_en_power_down_when_short |

enum e_WeakOutputCommonModeVoltageControl

Enumerator
common_output_voltage_generated_from_resistor_divider |
common_output_voltage_generated_from_bandgap_reference |

enum e_WordClockDirectionalControl

Enumerator
word_clock_is_an_input |
word_clock_is_an_output |

## Function Documentation

GD_RES_CODE tlv320aic33_get_headphones_volume_db | ( | float * | p_f_volume) |  |

Get real headphones volume.

Parameters

  p_f_volume | Pointer to address where result will be written

Returns
  GD_SUCCESS (0) if all right

GD_RES_CODE tlv320aic33_init | ( | void | ) |  |

Initialize TLV320AIC33.

Must be called before any other function from this library!

Returns
  GD_SUCCESS (0) if all right

GD_RES_CODE tlv320aic33_read_data | ( | uint8_t | i_register_number,
|  | uint8_t * | p_data
| ) |  |
| inline

Read data on TWI (I2C) bus.

MCU is in master mode. Send TLV320AIC33 address and register value. Stop
condition. Send address and then receive data (1B). This function also
check if TWI module is available (when RTOS support is enabled).

Parameters

  p_data | Data are saved thru this pointer
  i_register_number | Register number

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_reset | ( | void | ) |  |
| inline

Set page to 0 and restart codec.

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_CLKDIV_IN_source | ( | e_CLKDIV_INSourceSelection | e_source) |  |

Set CLKDIV_IN source.

Parameters

  e_source | Options are defined in e_CLKDIV_INSourceSelection

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_DAC_mute | ( | uint8_t | i_mute_flag) |  |

Enable or disable mute flag on DAC.

Parameters

  i_mute_flag | 0 - disable mute ; 1 - enable mute

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_DAC_play_input_data | ( | uint8_t | i_play_stereo) |  |

Set DAC data path to input data.

Parameters

  i_play_stereo | Options: 0 - mix left and right input data channel ; 1 - input data are send directly to DAC

Returns
  GD_SUCCESS (0) if all right

GD_RES_CODE tlv320aic33_set_DAC_power | ( | uint8_t | enable_DACs) |  |

Enable or disable DACs.

Parameters

  enable_DACs | Options: 0 - disable DACs ; 1 - enable DACs

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_DAC_volume | ( | uint8_t | i_volume) |  |

Set DAC volume in raw format.

Volume is in binary representation in codec register, so it is up to user
to recalculate it to dB.

Parameters

  i_volume | Volume value (7 bit number) in binary representation for register

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_DAC_volume_dB | ( | float | f_volume) |  |

Set DAC volume. Volume is in dB.

Because codec have 0.5 dB step, function convergence input parameter to
closest result.

Parameters

  f_volume | Volume in dB. Range is from 0 to -63.5 dB. Step is 0.5 dB.

Returns
  GD_SUCCESS (0) if all right

GD_RES_CODE tlv320aic33_set_data_interface_mode | ( | e_AudioSerialDataInterfaceTransferMode | e_mode) |  |

Set data interface mode.

Parameters

  i_mode | Options are defined in e_AudioSerialDataInterfaceTransferMode

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_digital_interface_as_master | ( | uint8_t | i_master) |  |

Set digital interface as master or slave.

When set as master BCLK and WCLK are configured as output. Else BCLK and
WCLK is configured as input.

Parameters

  i_master | Options: 0 - configure as slave ; 1 - configure as master

Returns
  GD_SUCCESS (0) if all OKs

GD_RES_CODE tlv320aic33_set_driver_ramp_up_step_time | ( | e_DriverRampUpStepTimingControl | e_time) |  |

Set driver ramp-up step time.

Parameters

  e_time | Options are defined in e_DriverRampUpStepTimingControl

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_headphones_single_ended | ( | uint8_t | i_single_ended) |  |

Set headphone COM pins as single ended or differential.

Parameters

  single_ended | 0 - HPxCOM as differential ; 1 - HPxCOM as single ended

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_headphones_volume | ( | uint8_t | i_volume) |  |

Set headphone volume in raw format.

Volume is in binary representation in codec register, so it is up to user
to recalculate it to dB.

Parameters

  i_volume | Volume value (7 bit number) in binary representation for register

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_headphones_volume_dB | ( | float | f_volume) |  |

Set headphones volume. Volume is in dB.

Because codec approximately 0.5 dB step, function convergence input
parameter to closest result.

Parameters

  f_volume | Volume in dB. Range is from 0 to -78.3 dB. Step is approximately 0.5 dB.

Returns
  GD_SUCCESS (0) if all right

GD_RES_CODE tlv320aic33_set_output_driver_power_on_delay | ( | e_OutputDriverPowerOnDelayControl | e_delay) |  |

Set output driver power on delay.

Parameters

  e_delay | Options are defined in e_OutputDriverPowerOnDelayControl

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_PLLCLK_IN_source | ( | e_PLLCLK_INSourceSelection | e_source) |  |

Set PLLCLK_IN source.

Parameters

  e_source | Options are defined in e_PLLCLK_INSourceSelection

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_set_word_length | ( | uint8_t | i_word_length) |  |

Set word length.

Parameters

  i_word_length | Options: 16, 20, 24, 32

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE tlv320aic33_write_data | ( | const uint8_t | i_register_number,
|  | const uint8_t | i_value
| ) |  |
| inline

Write data on TWI (I2C) bus.

MCU is in master mode. Send TLV320AIC33 address, then register number and
data. This function also check if TWI module is available (when RTOS
support is enabled).

Parameters

  i_register_number | Register number
  i_value | Register value

Returns
  GD_SUCCESS (0) if all OK

## Variable Documentation

xSemaphoreHandle mutexI2C

const gd_config_struct TLV320AIC33_config_table[]

Configure table for device.

const gd_metadata TLV320AIC33_metadata