Sonochan II 0.1

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cs2200.c File Reference

Driver for fractional PLL CS2200. More...

`#include "cs2200.h"`

## Macros
#define | CS2200_MAX_CMD_ID 7
| Maximum command ID (is defined by last command) More...

## Functions
GD_RES_CODE | cs2200_init (void)
| Initialize CS2200. More...
GD_RES_CODE | cs2200_set_PLL_freq (uint32_t i_freq)
| Set PLL to get user defined frequency. More...
GD_RES_CODE | cs2200_get_PLL_freq (uint32_t *p_i_freq)
| Load set PLL frequency. More...
GD_RES_CODE | cs2200_inc_PLL_freq (void)
| Increase PLL frequency by 1 LSB in ratio. More...
GD_RES_CODE | cs2200_dec_PLL_freq (void)
| Decrease PLL frequency by 1 LSB in ratio. More...
GD_RES_CODE | cs2200_set_out_divider_multiplier_float (float f_div_mul)
| Set output divider. More...
GD_RES_CODE | cs2200_get_out_divider_multiplier_float (float *p_div_mul)
| Load output divider/multiplier value. More...
GD_RES_CODE | cs2200_set_out_divider_multiplier (cs2200_r_mod_t e_out_div_mul)
| Set output divider. More...
GD_RES_CODE | cs2200_get_out_divider_multiplier (cs2200_r_mod_t *p_e_out_div_mul)
| Load value for output divider/multiplier. More...
GD_RES_CODE | cs2200_set_save_change_ratio_by_1 (uint8_t i_save_change)
| Set flag that control PLL output when ratio is changed by 1. More...
GD_RES_CODE | cs2200_get_save_change_ratio_by_1 (uint8_t *p_save_change)
| Get flag that control PLL output when ratio is changed by 1. More...
GD_RES_CODE | cs2200_set_ratio (uint32_t i_ratio)
| Set ratio in PLL. More...
GD_RES_CODE | cs2200_get_ratio (uint32_t *p_i_ratio)
| Load ratio value. More...
GD_RES_CODE | cs2200_set_freeze_bit (uint8_t i_freeze_flag)
| Set or clear freeze bit. More...
GD_RES_CODE | cs2200_get_freeze_bit (uint8_t *p_i_freeze_flag)
| Load freeze bit. More...
GD_RES_CODE | cs2200_enable_device_cfg (void)
| Enable configuration in PLL registers. More...
GD_RES_CODE | cs2200_disable_device_cfg (void)
| Disable configuration in PLL registers. More...
GD_RES_CODE | cs2200_set_in_divider (cs2200_in_div_t e_in_div)
| Allow easily set input divider. More...
GD_RES_CODE | cs2200_get_in_divider (cs2200_in_div_t *p_e_in_div)
| Load in divider value. More...
GD_RES_CODE | cs2200_calc_frequency (uint32_t i_ratio, uint32_t *p_i_frequency)
| Calculate actual frequency from ratio. More...
GD_RES_CODE | cs2200_calc_ratio (uint32_t i_frequency, uint32_t *p_i_ratio)
| Calculate actual ratio from frequency. More...
GD_RES_CODE | cs2200_write_data (uint8_t *p_data, uint8_t i_number_of_bytes)
| Write data on TWI (I2C) bus. More...
GD_RES_CODE | cs2200_read_data (uint8_t *p_data, uint8_t i_number_of_bytes)
| Read data on TWI (I2C) bus. More...

## Variables
static cs2200_reg_img_t | s_register_img
| Register image of CS2200. More...
static cs2200_virtual_reg_img_t | s_virtual_reg_img
| Virtual register image. More...
const gd_config_struct | CS2200_config_table []
| Configure table for device. More...
const gd_metadata | CS2200_metadata
portBASE_TYPE | xStatus
xSemaphoreHandle | mutexI2C

## Detailed Description

Driver for fractional PLL CS2200.

Created: 12.03.2014
Modified: 07.05.2014

Version
  0.7

Author
  Martin Stejskal

## Macro Definition Documentation

#define CS2200_MAX_CMD_ID 7

Maximum command ID (is defined by last command)

## Function Documentation

GD_RES_CODE cs2200_calc_frequency | ( | uint32_t | i_ratio,
|  | uint32_t * | p_i_frequency
| ) |  |
| inline

Calculate actual frequency from ratio.

Parameters

  i_ratio | Ratio value
  p_i_frequency | Pointer to memory where frequency will be written

Returns
  GD_SUCCESS if clock source is known

GD_RES_CODE cs2200_calc_ratio | ( | uint32_t | i_frequency,
|  | uint32_t * | p_i_ratio
| ) |  |
| inline

Calculate actual ratio from frequency.

Parameters

  i_frequency | Frequency
  p_i_ratio | Pointer to memory where ratio will be written

Returns
  GD_SUCCESS if clock source is known

GD_RES_CODE cs2200_dec_PLL_freq | ( | void | ) |  |

Decrease PLL frequency by 1 LSB in ratio.

Decrease PLL output frequency approximately by 10 ppm

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_disable_device_cfg | ( | void | ) |  |

Disable configuration in PLL registers.

For normal operation (enable control port mode) is needed activate
configuration. This function turn off this

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_enable_device_cfg | ( | void | ) |  |

Enable configuration in PLL registers.

For normal operation (enable control port mode) is needed activate
configuration. This is done by this function.

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_get_freeze_bit | ( | uint8_t * | p_i_freeze_flag) |  |
| inline

Load freeze bit.

Parameters

  p_i_freeze_flag | Pointer to memory where freeze bit will be written

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_get_in_divider | ( | cs2200_in_div_t * | p_e_in_div) |  |
| inline

Load in divider value.

Parameters

  p_e_in_div | Pointer to memory where divider value will be written

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_get_out_divider_multiplier | ( | cs2200_r_mod_t * | p_e_out_div_mul) |  |
| inline

Load value for output divider/multiplier.

Parameters

  p_e_out_div_mul | Pointer to memory where value will be written

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_get_out_divider_multiplier_float | ( | float * | p_div_mul) |  |
| inline

Load output divider/multiplier value.

Parameters

  p_div_mul | Pinter to memory where value will be written

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_get_PLL_freq | ( | uint32_t * | p_i_freq) |  |
| inline

Load set PLL frequency.

Parameters

  p_i_freq | Pointer to memory where frequency will be written

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_get_ratio | ( | uint32_t * | p_i_ratio) |  |
| inline

Load ratio value.

Parameters

  p_i_ratio | Pointer define address where value will be written

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_get_save_change_ratio_by_1 | ( | uint8_t * | p_save_change) |  |
| inline

Get flag that control PLL output when ratio is changed by 1.

When PLL changing output frequency there may be undefined output. So in
default PLL set output to LOW and when is locked then enable output clock.
However this may take some time. When changing ratio just by 1, there is
big chance that output "will not get crazy" and time when output is in low
is reduced from approximately 500 us to 150 ns which sometimes can solve
a lot.
Anyway generally recommended value is 1.

Parameters

  p_save_change | Address where result will be saved

Returns
  GD_SUCCESS (0) if all right

GD_RES_CODE cs2200_inc_PLL_freq | ( | void | ) |  |

Increase PLL frequency by 1 LSB in ratio.

Increase PLL output frequency approximately by 10 ppm

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_init | ( | void | ) |  |

Initialize CS2200.

Must be called before any other function from this library!

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_read_data | ( | uint8_t * | p_data,
|  | uint8_t | i_number_of_bytes
| ) |  |
| inline

Read data on TWI (I2C) bus.

MCU is in master mode. Send CS2200 address and then receive data. This
function also check if TWI module is available (when RTOS support is
enabled).

Parameters

  p_data | Data are saved thru this pointer
  i_number_of_bytes | Number of data bytes, which will be received

Returns
  GD_SUCCESS (0) if all OK

GD_RES_CODE cs2200_set_freeze_bit | ( | uint8_t | i_freeze_flag) |  |

Set or clear freeze bit.

Parameters

  i_freeze_flag | 0 clear freeze bit, otherwise set freeze bit

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_set_in_divider | ( | cs2200_in_div_t | e_in_div) |  |

Allow easily set input divider.

This function is called in cs2200_init when CS2200_REF_CLK_FREQ is non
zero value

Parameters

  e_in_div | Options: CS2200_INPUT_DIVIDER_1x, CS2200_INPUT_DIVIDER_2x, CS2200_INPUT_DIVIDER_4x

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_set_out_divider_multiplier | ( | cs2200_r_mod_t | e_out_div_mul) |  |

Set output divider.

This function allow easily a quickly change output frequency. Sometimes
can be this useful when need just change frequency to 1/2x, 1/4x, 2x an so
on.

Parameters

  e_out_div_mul | Options: CS2200_R_MOD__MUL_1x, CS2200_R_MOD__MUL_2x, CS2200_R_MOD__MUL_4x, CS2200_R_MOD__MUL_8x, CS2200_R_MOD__DIV_2x, CS2200_R_MOD__DIV_4x, CS2200_R_MOD__DIV_8x, CS2200_R_MOD__DIV_16x

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_set_out_divider_multiplier_float | ( | float | f_div_mul) |  |

Set output divider.

This function allow easily a quickly change output frequency. Sometimes
can be this useful when need just change frequency to 1/2x, 1/4x, 2x an so
on.

Parameters

  f_div_mul | Divider/multiplier ratio. Valid values: 1 2 4 8 0.5 0.25 0.125 0.0625

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_set_PLL_freq | ( | uint32_t | i_freq) |  |

Set PLL to get user defined frequency.

If CS2200_REF_CLK_FREQ is 0, then just send data (i_freq argument) to PLL
and activate values. Also set output divider/multiplier back to 1 to make
sure that output frequency is correct.

Parameters

  i_freq | Frequency which user want. In case, that CS2200_REF_CLK_FREQ is 0, then no calculation is done and data are send directly to PLL.

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_set_ratio | ( | uint32_t | i_ratio) |  |

Set ratio in PLL.

This function set ratio and if possible then calculate actual frequency.

Parameters

  i_ratio | Ratio value

Returns
  GD_SUCCESS if all right

GD_RES_CODE cs2200_set_save_change_ratio_by_1 | ( | uint8_t | i_save_change) |  |

Set flag that control PLL output when ratio is changed by 1.

When PLL changing output frequency there may be undefined output. So in
default PLL set output to LOW and when is locked then enable output clock.
However this may take some time. When changing ratio just by 1, there is
big chance that output "will not get crazy" and time when output is in low
is reduced from approximately 500 us to 150 ns which sometimes can solve
a lot.
Anyway generally is recommended set this flag to 1 (save change).

Parameters

  i_save_change | Options: 1 - save frequency change by 1 (recommended) 0 - "dangerous" frequency change by 1, but with very short clock shortage

Returns
  GD_SUCCESS (0) if all right

GD_RES_CODE cs2200_write_data | ( | uint8_t * | p_data,
|  | uint8_t | i_number_of_bytes
| ) |  |
| inline

Write data on TWI (I2C) bus.

MCU is in master mode. Send CS2200 address and then data (argument). This
function also check if TWI module is available (when RTOS support is
enabled).

Parameters

  p_data | Pointer to data array which will be send to PLL thru TWI (I2C)
  i_number_of_bytes | Number of data bytes, which will be send

Returns
  GD_SUCCESS (0) if all OK

## Variable Documentation

const gd_config_struct CS2200_config_table[]

Configure table for device.

const gd_metadata CS2200_metadata

Initial value:
=
{
CS2200_MAX_CMD_ID,
"Fractional PLL CS2200-CP v0.7",
(gd_config_struct*)&CS2200_config_table[0],
0x21
}

xSemaphoreHandle mutexI2C

cs2200_reg_img_t s_register_img
| static

Register image of CS2200.

It is static, so it is "global" only for this file.

cs2200_virtual_reg_img_t s_virtual_reg_img
| static

Virtual register image.

This values PLL directly do not have in memory. However, there are in more
human readable format. Also some values can use generic driver (need to
point to result variables and so on).
t is static, so it is "global" only for this file.

portBASE_TYPE xStatus