/** ###################################################################
**     THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Vectors.C
**     Project   : vga2scart
**     Processor : MC9S08QD4CPC
**     Version   : Component 01.037, Driver 01.35, CPU db: 3.00.002
**     Compiler  : CodeWarrior HCS08 C Compiler
**     Date/Time : 7.7.2010, 1:29
**     Abstract  :
**         This bean "MC9S08QD4_8" contains initialization of the
**         CPU and provides basic methods and events for CPU core
**         settings.
**     Settings  :
**
**
**     Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved.
**     
**     http      : www.freescale.com
**     mail      : support@freescale.com
** ###################################################################*/


#include "Cpu.h"
#include "HSync.h"
#include "HSyncTimeout.h"
#include "CSyncEn.h"
#include "CSyncInv.h"
#include "VSync.h"
#include "RgbStatus.h"
extern near void _EntryPoint(void);

void (* near const _vect[])(void) @0xFFD0 = { /* Interrupt vector table */
         Cpu_Interrupt,                /* Int.no. 23 Vrti (at FFD0)                  Unassigned */
         Cpu_Interrupt,                /* Int.no. 22 VReserved22 (at FFD2)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 21 VReserved21 (at FFD4)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 20 VReserved20 (at FFD6)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 19 Vadc1 (at FFD8)                 Unassigned */
         Cpu_Interrupt,                /* Int.no. 18 Vkeyboard1 (at FFDA)            Unassigned */
         Cpu_Interrupt,                /* Int.no. 17 VReserved17 (at FFDC)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 16 VReserved16 (at FFDE)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 15 VReserved15 (at FFE0)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 14 VReserved14 (at FFE2)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 13 VReserved13 (at FFE4)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 12 VReserved12 (at FFE6)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 11 VReserved11 (at FFE8)           Unassigned */
         Cpu_Interrupt,                /* Int.no. 10 Vtpm2ovf (at FFEA)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  9 VReserved9 (at FFEC)            Unassigned */
         HSyncTimeout_Interrupt,       /* Int.no.  8 Vtpm2ch0 (at FFEE)              Used */
         Cpu_Interrupt,                /* Int.no.  7 Vtpm1ovf (at FFF0)              Unassigned */
         HSync_Interrupt,              /* Int.no.  6 Vtpm1ch1 (at FFF2)              Used */
         Cpu_Interrupt,                /* Int.no.  5 Vtpm1ch0 (at FFF4)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  4 VReserved4 (at FFF6)            Unassigned */
         Cpu_Interrupt,                /* Int.no.  3 Virq (at FFF8)                  Unassigned */
         Cpu_Interrupt,                /* Int.no.  2 Vlvd (at FFFA)                  Unassigned */
         Cpu_Interrupt,                /* Int.no.  1 Vswi (at FFFC)                  Unassigned */
         _EntryPoint                   /* Int.no.  0 Vreset (at FFFE)                Reset vector */
};
/*
** ###################################################################
**
**     This file was created by Processor Expert 3.07 [04.34]
**     for the Freescale HCS08 series of microcontrollers.
**
** ###################################################################
*/

