#-- Synopsys, Inc.
#-- Version 9.6L3
#-- Project file E:\lucifer\le24x2\le24x2_cpu_v01a\run_options.txt
#-- Written on Thu Jul 22 15:10:00 2010


#add_file options
add_file -verilog "C:/ispTOOLS7_2_STRT/ispcpld/../cae_library/synthesis/verilog/XP.v"
add_file -verilog "./Dimmers48.h"
add_file -verilog "./dimmers48f.v"


#implementation: "le24x2_cpu_v01a"
impl -add le24x2_cpu_v01a -type fpga

#device options
set_option -technology LATTICE-XP
set_option -part LFXP3C
set_option -package Q208
set_option -speed_grade -3
set_option -part_companion ""

#compilation/mapping options
set_option -default_enum_encoding default
set_option -resource_sharing 1
set_option -top_module "Dimmers48F"

#map options
set_option -frequency 200.000
set_option -vendor_xcompatible_mode 0
set_option -vendor_xcompatible_mode 0
set_option -fanout_limit 100
set_option -disable_io_insertion 0
set_option -retiming 0
set_option -pipe 0
set_option -force_gsr false
set_option -fixgatedclocks 3
set_option -fixgeneratedclocks 3


#sequential_optimizations options
set_option -symbolic_fsm_compiler 1

#simulation options
set_option -write_verilog 1
set_option -write_vhdl 1

#automatic place and route (vendor) options
set_option -write_apr_constraint 0

#set result format/file last
project -result_file "./Dimmers48F.edi"

#set log file 
set_option log_file "E:/lucifer/le24x2/le24x2_cpu_v01a/dimmers48f.srf" 

#
#implementation attributes

set_option -vlog_std v2001
set_option -num_critical_paths 3
set_option -num_startend_points 0
set_option -dup false
set_option -compiler_compatible true
set_option -auto_constrain_io true
impl -active "le24x2_cpu_v01a"
