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--									Implementace protokolu UDP  			  	  		  		  --
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.my_constants.all;

entity udp_core is
PORT (
		TX_CLK : IN std_logic;
		RX_CLK : IN std_logic;
		
		-- z IP vrstvy
		DATA_FROM_IP : IN std_logic_vector(7 downto 0);
		DATA_FROM_IP_VLD : IN std_logic;
		DATA_FROM_IP_GOOD : IN std_logic;
		DATA_FROM_IP_BAD : IN std_logic;
		SOURCE_IP : IN std_logic_vector(31 downto 0);
		
		-- do IP vrsty
		DATA_TO_IP : OUT std_logic_vector(7 downto 0);
		DATA_TO_IP_VLD : OUT std_logic;
		DATA_TO_IP_LEN: out std_logic_vector(UDP_ADDR_WIDTH - 1 downto 0);
		DATA_TO_IP_ACK : IN std_logic;

		-- do vyssi vrstvy
		RX_DATA : OUT std_logic_vector(7 downto 0);
		RX_DATA_VLD : OUT std_logic;
		RX_DATA_GOOD : OUT std_logic;
		RX_DATA_BAD : OUT std_logic;
		
		-- z vyssi vrstvy
		TX_DATA : IN std_logic_vector(7 downto 0);
		TX_DATA_VLD : IN std_logic;
		TX_DATA_EN : OUT std_logic;
		
		DESTINATION_PORT : IN std_logic_vector(15 downto 0);
		DESTINATION_IP : IN std_logic_vector(31 downto 0);
		-- reset
		RESET : IN std_logic          
	);
end udp_core;

architecture Behavioral of udp_core is

COMPONENT udp_rx is
	port (
		CLK_RX : IN std_logic;
		DATA_FROM_IP : IN std_logic_vector(7 downto 0);
		DATA_FROM_IP_VLD : IN std_logic;
		DATA_FROM_IP_GOOD : IN std_logic;
		DATA_FROM_IP_BAD : IN std_logic;

		RX_DATA : OUT std_logic_vector(7 downto 0);
		RX_DATA_VLD : OUT std_logic;
		RX_DATA_GOOD : OUT std_logic;
		RX_DATA_BAD : OUT std_logic;
		
		SOURCE_IP : IN std_logic_vector(31 downto 0);	
		RESET : IN std_logic          
	);
END COMPONENT;


COMPONENT udp_tx
	port (
		CLK_TX: in std_logic;
			
		-- uzivatelske rozhrani vstup
		TX_DATA: in std_logic_vector(7 downto 0);
		TX_DATA_VLD: in std_logic;
		TX_DATA_EN: out std_logic;
		
		-- do IP vrstvy
		DATA_TO_IP: out std_logic_vector(7 downto 0);
		DATA_TO_IP_VLD: out std_logic;
		DATA_TO_IP_LEN: out std_logic_vector(UDP_ADDR_WIDTH - 1 downto 0);
		DATA_TO_IP_ACK: in std_logic;
		
		--Control
		DESTINATION_PORT: in std_logic_vector(15 downto 0);		-- Port aplikace v PC
		DESTINATION_IP: in std_logic_vector(31 downto 0);

		-- reset
		RESET: in std_logic
	);

END COMPONENT;

begin
	
	Inst_udp_rx: udp_rx PORT MAP(
		CLK_RX => RX_CLK,

		RX_DATA => RX_DATA,
		RX_DATA_VLD => RX_DATA_VLD,
		RX_DATA_GOOD => RX_DATA_GOOD,
		RX_DATA_BAD => RX_DATA_BAD,

		DATA_FROM_IP => DATA_FROM_IP,
		DATA_FROM_IP_VLD => DATA_FROM_IP_VLD,
		DATA_FROM_IP_GOOD => DATA_FROM_IP_GOOD,
		DATA_FROM_IP_BAD => DATA_FROM_IP_BAD,

		SOURCE_IP => SOURCE_IP,
		RESET => RESET
	);
	

	Inst_udp_tx: udp_tx PORT MAP(
		CLK_TX => TX_CLK,
		
		TX_DATA => TX_DATA,
		TX_DATA_VLD => TX_DATA_VLD,
		TX_DATA_EN => TX_DATA_EN,
		
		DATA_TO_IP => DATA_TO_IP,
		DATA_TO_IP_VLD => DATA_TO_IP_VLD,
		DATA_TO_IP_LEN => DATA_TO_IP_LEN,
		DATA_TO_IP_ACK => DATA_TO_IP_ACK,

		DESTINATION_PORT => DESTINATION_PORT,
		DESTINATION_IP => DESTINATION_IP,

		RESET => RESET
	);

end Behavioral;

