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-- Company: 
-- Engineer: 
-- 
-- Create Date: 18.05.2016 09:25:00
-- Design Name: 
-- Module Name: iobuf - Behavioral
-- Project Name: 
-- Target Devices: 
-- Tool Versions: 
-- Description: 
-- 
-- Dependencies: 
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity iobuf is
    Port ( i 	: out		STD_LOGIC;
           o 	: in 		STD_LOGIC;
           io 	: inout 	STD_LOGIC;
           t 	: in 		STD_LOGIC
           );
end iobuf;

architecture Behavioral of iobuf is

begin
io <= o when t = '1' else 'Z';
i <= io;


end Behavioral;
