# 
# Synthesis run script generated by Vivado
# 

set_param general.maxThreads 8
set_msg_config -id {HDL 9-1061} -limit 100000
set_msg_config -id {HDL 9-1654} -limit 100000
create_project -in_memory -part xc7z020clg484-1

set_param project.compositeFile.enableAutoGeneration 0
set_param synth.vivado.isSynthRun true
set_property webtalk.parent_dir C:/Vivado_projects/IP_REPO/ASSERT_DISASSERT/ASSERT_DISASSERT.cache/wt [current_project]
set_property parent.project_path C:/Vivado_projects/IP_REPO/ASSERT_DISASSERT/ASSERT_DISASSERT.xpr [current_project]
set_property default_lib xil_defaultlib [current_project]
set_property target_language VHDL [current_project]
set_property ip_repo_paths c:/Vivado_projects/IP_REPO/ASSERT_DISASSERT/ASSERT_DISASSERT.srcs [current_project]
set_property vhdl_version vhdl_2k [current_fileset]
read_vhdl -library xil_defaultlib C:/Vivado_projects/IP_REPO/ASSERT_DISASSERT/ASSERT_DISASSERT.srcs/sources_1/new/assert_disassert.vhd
read_xdc -mode out_of_context C:/Vivado_projects/IP_REPO/ASSERT_DISASSERT/ASSERT_DISASSERT.srcs/constrs_1/new/false_paths_ooc.xdc
set_property used_in_implementation false [get_files C:/Vivado_projects/IP_REPO/ASSERT_DISASSERT/ASSERT_DISASSERT.srcs/constrs_1/new/false_paths_ooc.xdc]

read_xdc C:/Vivado_projects/IP_REPO/ASSERT_DISASSERT/ASSERT_DISASSERT.srcs/constrs_1/new/false_paths.xdc
set_property used_in_implementation false [get_files C:/Vivado_projects/IP_REPO/ASSERT_DISASSERT/ASSERT_DISASSERT.srcs/constrs_1/new/false_paths.xdc]
set_property processing_order LATE [get_files C:/Vivado_projects/IP_REPO/ASSERT_DISASSERT/ASSERT_DISASSERT.srcs/constrs_1/new/false_paths.xdc]

synth_design -top assert_disassert -part xc7z020clg484-1
write_checkpoint -noxdef assert_disassert.dcp
catch { report_utilization -file assert_disassert_utilization_synth.rpt -pb assert_disassert_utilization_synth.pb }
