/* This file is part of the libopencm3 project.
 *
 * It was generated by the irq2nvic_h script.
 *
 * These definitions bend every interrupt handler that is defined CMSIS style
 * to the weak symbol exported by libopenmc3.
 */

#define NVIC_WWDG_IRQHandler nvic_wwdg_isr
#define PVD_IRQHandler pvd_isr
#define TAMP_STAMP_IRQHandler tamp_stamp_isr
#define RTC_WKUP_IRQHandler rtc_wkup_isr
#define FLASH_IRQHandler flash_isr
#define RCC_IRQHandler rcc_isr
#define EXTI0_IRQHandler exti0_isr
#define EXTI1_IRQHandler exti1_isr
#define EXTI2_IRQHandler exti2_isr
#define EXTI3_IRQHandler exti3_isr
#define EXTI4_IRQHandler exti4_isr
#define DMA1_STREAM0_IRQHandler dma1_stream0_isr
#define DMA1_STREAM1_IRQHandler dma1_stream1_isr
#define DMA1_STREAM2_IRQHandler dma1_stream2_isr
#define DMA1_STREAM3_IRQHandler dma1_stream3_isr
#define DMA1_STREAM4_IRQHandler dma1_stream4_isr
#define DMA1_STREAM5_IRQHandler dma1_stream5_isr
#define DMA1_STREAM6_IRQHandler dma1_stream6_isr
#define ADC_IRQHandler adc_isr
#define CAN1_TX_IRQHandler can1_tx_isr
#define CAN1_RX0_IRQHandler can1_rx0_isr
#define CAN1_RX1_IRQHandler can1_rx1_isr
#define CAN1_SCE_IRQHandler can1_sce_isr
#define EXTI9_5_IRQHandler exti9_5_isr
#define TIM1_BRK_TIM9_IRQHandler tim1_brk_tim9_isr
#define TIM1_UP_TIM10_IRQHandler tim1_up_tim10_isr
#define TIM1_TRG_COM_TIM11_IRQHandler tim1_trg_com_tim11_isr
#define TIM1_CC_IRQHandler tim1_cc_isr
#define TIM2_IRQHandler tim2_isr
#define TIM3_IRQHandler tim3_isr
#define TIM4_IRQHandler tim4_isr
#define I2C1_EV_IRQHandler i2c1_ev_isr
#define I2C1_ER_IRQHandler i2c1_er_isr
#define I2C2_EV_IRQHandler i2c2_ev_isr
#define I2C2_ER_IRQHandler i2c2_er_isr
#define SPI1_IRQHandler spi1_isr
#define SPI2_IRQHandler spi2_isr
#define USART1_IRQHandler usart1_isr
#define USART2_IRQHandler usart2_isr
#define USART3_IRQHandler usart3_isr
#define EXTI15_10_IRQHandler exti15_10_isr
#define RTC_ALARM_IRQHandler rtc_alarm_isr
#define USB_FS_WKUP_IRQHandler usb_fs_wkup_isr
#define TIM8_BRK_TIM12_IRQHandler tim8_brk_tim12_isr
#define TIM8_UP_TIM13_IRQHandler tim8_up_tim13_isr
#define TIM8_TRG_COM_TIM14_IRQHandler tim8_trg_com_tim14_isr
#define TIM8_CC_IRQHandler tim8_cc_isr
#define DMA1_STREAM7_IRQHandler dma1_stream7_isr
#define FSMC_IRQHandler fsmc_isr
#define SDIO_IRQHandler sdio_isr
#define TIM5_IRQHandler tim5_isr
#define SPI3_IRQHandler spi3_isr
#define UART4_IRQHandler uart4_isr
#define UART5_IRQHandler uart5_isr
#define TIM6_DAC_IRQHandler tim6_dac_isr
#define TIM7_IRQHandler tim7_isr
#define DMA2_STREAM0_IRQHandler dma2_stream0_isr
#define DMA2_STREAM1_IRQHandler dma2_stream1_isr
#define DMA2_STREAM2_IRQHandler dma2_stream2_isr
#define DMA2_STREAM3_IRQHandler dma2_stream3_isr
#define DMA2_STREAM4_IRQHandler dma2_stream4_isr
#define ETH_IRQHandler eth_isr
#define ETH_WKUP_IRQHandler eth_wkup_isr
#define CAN2_TX_IRQHandler can2_tx_isr
#define CAN2_RX0_IRQHandler can2_rx0_isr
#define CAN2_RX1_IRQHandler can2_rx1_isr
#define CAN2_SCE_IRQHandler can2_sce_isr
#define OTG_FS_IRQHandler otg_fs_isr
#define DMA2_STREAM5_IRQHandler dma2_stream5_isr
#define DMA2_STREAM6_IRQHandler dma2_stream6_isr
#define DMA2_STREAM7_IRQHandler dma2_stream7_isr
#define USART6_IRQHandler usart6_isr
#define I2C3_EV_IRQHandler i2c3_ev_isr
#define I2C3_ER_IRQHandler i2c3_er_isr
#define OTG_HS_EP1_OUT_IRQHandler otg_hs_ep1_out_isr
#define OTG_HS_EP1_IN_IRQHandler otg_hs_ep1_in_isr
#define OTG_HS_WKUP_IRQHandler otg_hs_wkup_isr
#define OTG_HS_IRQHandler otg_hs_isr
#define DCMI_IRQHandler dcmi_isr
#define CRYP_IRQHandler cryp_isr
#define HASH_RNG_IRQHandler hash_rng_isr
