/** ###################################################################
**     THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename    : Vectors.c
**     Project     : ProcessorExpert
**     Processor   : MKL25Z128VLK4
**     Version     : Component 01.025, Driver 01.04, CPU db: 3.00.000
**     Compiler    : GNU C Compiler
**     Date/Time   : 2013-05-15, 16:32, # CodeGen: 242
**     Abstract    :
**
**     Settings    :
**
**
**     Copyright : 1997 - 2012 Freescale, Inc. All Rights Reserved.
**     
**     http      : www.freescale.com
**     mail      : support@freescale.com
** ###################################################################*/

  #include "Cpu.h"
  #include "TI1.h"
  #include "TU1.h"
  #include "AD2.h"
  #include "AdcLdd1.h"
  #include "I2C2.h"
  #include "IN1A.h"
  #include "BitIoLdd3.h"
  #include "IN2A.h"
  #include "BitIoLdd5.h"
  #include "IN1B.h"
  #include "BitIoLdd4.h"
  #include "IN2B.h"
  #include "BitIoLdd6.h"
  #include "TU2.h"
  #include "WAIT1.h"
  #include "BT.h"
  #include "CsIO1.h"
  #include "IO1.h"
  #include "RWExt.h"
  #include "ExtIntLdd1.h"
  #include "RWExt2.h"
  #include "ExtIntLdd4.h"
  #include "LWExt.h"
  #include "ExtIntLdd2.h"
  #include "LWExt2.h"
  #include "ExtIntLdd3.h"
  #include "PWM_ENA.h"
  #include "PwmLdd1.h"
  #include "PWM_ENB.h"
  #include "PwmLdd2.h"
  #include "Events.h"


  /* ISR prototype */
  extern uint32_t __SP_INIT;
  extern void __thumb_startup( void );
  
  
  /*lint -esym(765,__vect_table) Disable MISRA rule (8.10) checking for symbols (__vect_table). Definition of the interrupt vector table placed by linker on a predefined location. */
  /*lint -save  -e926 -e927 -e928 -e929 Disable MISRA rule (11.4) checking. Need to explicitly cast pointers to the general ISR for Interrupt vector table */
  
  __attribute__ ((section (".vectortable"))) const tVectorTable __vect_table = { /* Interrupt vector table */
  
    /* ISR name                             No. Address      Pri Name                          Description */
    &__SP_INIT,                        /* 0x00  0x00000000   -   ivINT_Initial_Stack_Pointer   used by PE */
    {
    (tIsrFunc)&__thumb_startup,        /* 0x01  0x00000004   -   ivINT_Initial_Program_Counter used by PE */
    (tIsrFunc)&Cpu_INT_NMIInterrupt,   /* 0x02  0x00000008   -2   ivINT_NMI                     used by PE */
    (tIsrFunc)&Cpu_ivINT_Hard_Fault,   /* 0x03  0x0000000C   -1   ivINT_Hard_Fault              unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved4,    /* 0x04  0x00000010   -   ivINT_Reserved4               unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved5,    /* 0x05  0x00000014   -   ivINT_Reserved5               unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved6,    /* 0x06  0x00000018   -   ivINT_Reserved6               unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved7,    /* 0x07  0x0000001C   -   ivINT_Reserved7               unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved8,    /* 0x08  0x00000020   -   ivINT_Reserved8               unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved9,    /* 0x09  0x00000024   -   ivINT_Reserved9               unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved10,   /* 0x0A  0x00000028   -   ivINT_Reserved10              unused by PE */
    (tIsrFunc)&Cpu_ivINT_SVCall,       /* 0x0B  0x0000002C   -   ivINT_SVCall                  unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved12,   /* 0x0C  0x00000030   -   ivINT_Reserved12              unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved13,   /* 0x0D  0x00000034   -   ivINT_Reserved13              unused by PE */
    (tIsrFunc)&Cpu_ivINT_PendableSrvReq, /* 0x0E  0x00000038   -   ivINT_PendableSrvReq          unused by PE */
    (tIsrFunc)&Cpu_ivINT_SysTick,      /* 0x0F  0x0000003C   -   ivINT_SysTick                 unused by PE */
    (tIsrFunc)&Cpu_ivINT_DMA0,         /* 0x10  0x00000040   -   ivINT_DMA0                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_DMA1,         /* 0x11  0x00000044   -   ivINT_DMA1                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_DMA2,         /* 0x12  0x00000048   -   ivINT_DMA2                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_DMA3,         /* 0x13  0x0000004C   -   ivINT_DMA3                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved20,   /* 0x14  0x00000050   -   ivINT_Reserved20              unused by PE */
    (tIsrFunc)&Cpu_ivINT_FTFA,         /* 0x15  0x00000054   -   ivINT_FTFA                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_LVD_LVW,      /* 0x16  0x00000058   -   ivINT_LVD_LVW                 unused by PE */
    (tIsrFunc)&Cpu_ivINT_LLW,          /* 0x17  0x0000005C   -   ivINT_LLW                     unused by PE */
    (tIsrFunc)&I2C2_Interrupt,         /* 0x18  0x00000060   2   ivINT_I2C0                    used by PE */
    (tIsrFunc)&Cpu_ivINT_I2C1,         /* 0x19  0x00000064   -   ivINT_I2C1                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_SPI0,         /* 0x1A  0x00000068   -   ivINT_SPI0                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_SPI1,         /* 0x1B  0x0000006C   -   ivINT_SPI1                    unused by PE */
    (tIsrFunc)&BT_Interrupt,           /* 0x1C  0x00000070   2   ivINT_UART0                   used by PE */
    (tIsrFunc)&Cpu_ivINT_UART1,        /* 0x1D  0x00000074   -   ivINT_UART1                   unused by PE */
    (tIsrFunc)&Cpu_ivINT_UART2,        /* 0x1E  0x00000078   -   ivINT_UART2                   unused by PE */
    (tIsrFunc)&AdcLdd1_MeasurementCompleteInterrupt, /* 0x1F  0x0000007C   1   ivINT_ADC0                    used by PE */
    (tIsrFunc)&Cpu_ivINT_CMP0,         /* 0x20  0x00000080   -   ivINT_CMP0                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_TPM0,         /* 0x21  0x00000084   -   ivINT_TPM0                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_TPM1,         /* 0x22  0x00000088   -   ivINT_TPM1                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_TPM2,         /* 0x23  0x0000008C   2   ivINT_TPM2                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_RTC,          /* 0x24  0x00000090   -   ivINT_RTC                     unused by PE */
    (tIsrFunc)&Cpu_ivINT_RTC_Seconds,  /* 0x25  0x00000094   -   ivINT_RTC_Seconds             unused by PE */
    (tIsrFunc)&Cpu_ivINT_PIT,          /* 0x26  0x00000098   -   ivINT_PIT                     unused by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved39,   /* 0x27  0x0000009C   -   ivINT_Reserved39              unused by PE */
    (tIsrFunc)&Cpu_ivINT_USB0,         /* 0x28  0x000000A0   -   ivINT_USB0                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_DAC0,         /* 0x29  0x000000A4   -   ivINT_DAC0                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_TSI0,         /* 0x2A  0x000000A8   -   ivINT_TSI0                    unused by PE */
    (tIsrFunc)&Cpu_ivINT_MCG,          /* 0x2B  0x000000AC   -   ivINT_MCG                     unused by PE */
    (tIsrFunc)&TU1_Interrupt,          /* 0x2C  0x000000B0   2   ivINT_LPTimer                 used by PE */
    (tIsrFunc)&Cpu_ivINT_Reserved45,   /* 0x2D  0x000000B4   -   ivINT_Reserved45              unused by PE */
    (tIsrFunc)&Cpu_ivINT_PORTA,        /* 0x2E  0x000000B8   2   ivINT_PORTA                   used by PE */
    (tIsrFunc)&Cpu_ivINT_PORTD         /* 0x2F  0x000000BC   2   ivINT_PORTD                   used by PE */
    }
  };
  /*lint -restore Enable MISRA rule (11.4) checking. */
  

/*
** ###################################################################
**
**     This file was created by Processor Expert 10.0 [05.03]
**     for the Freescale Kinetis series of microcontrollers.
**
** ###################################################################
*/
