/************************************************************************************
* The global header file containing platform specific definitions for
* the embedded platform
*
* Author(s): Thomas O. Jensen
*
* (c) Copyright 2004, Freescale, Inc.  All rights reserved.
*
* Freescale Confidential Proprietary
* Digianswer Confidential
*
* No part of this document must be reproduced in any form - including copied,
* transcribed, printed or by any electronic means - without specific written
* permission from Freescale.
*
* Last Inspected:
* Last Tested:
************************************************************************************/

#ifndef _ALL_TARGET_SPECIFIC_H_
#define _ALL_TARGET_SPECIFIC_H_

#include "gb60_io.h"
#include "FunctionalityDefines.h"

//**********************************************************************************
// Compiler warning removal pragmas
//**********************************************************************************

#define PLACE_CONST_SEG(segment) CONST_SEG segment
#define RESTORE_CONST_SEG CONST_SEG DEFAULT

#define PLACE_DATA_SEG(segment) DATA_SEG segment
#define RESTORE_DATA_SEG DATA_SEG DEFAULT

#define INLINE_NEXT_FUNCTION INLINE

#define Unreferenced_c            C5703
#define ConditionAlwaysTrue_c     C4000
#define ConditionAlwaysFalse_c    C4001
#define AssignmentInCondition_c   C5909
#define UnusedResultOfFunction_c  C1420
#define NonStandardConversion_c   C1805
#define InlineFunctionCall_c      C4301
#define RemovedDeadCode_c         C5660
#define ResultNotUsed_c           C4002
#define RecursiveFunctionCall_c   C1855
#define UninitializedVariable_c   C5651

#define DISABLE_WARNING(msg) MESSAGE DISABLE msg
#define RESTORE_WARNING(msg) MESSAGE DEFAULT msg

// GROUP: SELECT ONE
#define PLATFORM_GB60       /* Set uProcessor platform as target */
//#define PLATFORM_WINDOWS /* Set windows platform as target */
// ENDGROUP

#ifdef INCLUDE_802_15_4 // Defined by NWK build environment
 #define F8W_NWK_PRESENT 1 // Define if compiling for F8W target - excludes PTC PHY fnc-table init.
#else
 //#define F8W_NWK_PRESENT 1
#endif INCLUDE_802_15_4

//#define RX_TIMING_MEASUREMENT

//#define ENABLE_SIMULATOR 1 /* When defined, use HAL/MAL for BTLC comm. */

#define LITTLE_ENDIAN 0
#define BIG_ENDIAN    1

//#define TIME_INTERRUPT
//#define CODE_PROFILING
//#define ENABLETIMING /* ensure TIME_INTERRUPT is not defined!!! */

#ifdef TIME_INTERRUPT
  #define ENABLE_ISR_TIMING_PINS PTADD |= 0x0f;

  #define CHECK_ABEL_ISR_RUNNING_1 PTAD & 0x02;
  #define ISR_DISABLED_0 PTAD |= 0x01;
  #define ABEL_ISR_RUNNING_1 PTAD |= 0x02;

  #define ISR_ENABLED_0 PTAD &= ~0x01;
  #define ABEL_ISR_DONE_1 PTAD &= ~0x02;

  #define ISR_TOGGLE_0 PTAD ^= 0x01;
  #define ABEL_ISR_TOGGLE_1 PTAD ^= 0x02;

  #define ISR_TIMING_SET_2 PTAD |= 0x04;
  #define ISR_TIMING_SET_3 PTAD |= 0x08;
  #define ISR_TIMING_CLR_2 PTAD &= ~0x04;
  #define ISR_TIMING_CLR_3 PTAD &= ~0x08;
  #define ISR_TIMING_TGL_2 PTAD ^= 0x04;
  #define ISR_TIMING_TGL_3 PTAD ^= 0x08;
#else
  #define ENABLE_ISR_TIMING_PINS
  #define ISR_DISABLED_0
  #define ABEL_ISR_RUNNING_1

  #define ISR_ENABLED_0
  #define ABEL_ISR_DONE_1

  #define ISR_TOGGLE_0
  #define ABEL_ISR_TOGGLE_1

  #define ISR_TIMING_SET_2
  #define ISR_TIMING_SET_3
  #define ISR_TIMING_CLR_2
  #define ISR_TIMING_CLR_3
  #define ISR_TIMING_TGL_2
  #define ISR_TIMING_TGL_3
#endif

#define ENABLE_ALL_INTERRUPTS   {__asm CLI; ISR_ENABLED_0;}  // Macros to enable/disable all processor interrupts
#define DISABLE_ALL_INTERRUPTS  {__asm SEI; ISR_DISABLED_0;}

// Macros to enable/disable Abel interrupt
#define ENABLE_ABEL_INTERRUPTS_FAST   IRQSC |= 0x02;       //Set IRQPE = IRQ pin from Abel enabled
#define DISABLE_ABEL_INTERRUPTS_FAST  IRQSC &= ~0x02;      //Clear IRQPE = IRQ pin from Abel disabled
#define DISABLE_ABEL_INTERRUPTS(var) {__asm LDA 0x14; __asm STA var; __asm BCLR 1,0x14;}
#define ENABLE_ABEL_INTERRUPTS(var)  {__asm LDA var; __asm STA 0x14;}

#define HANDSHAKE_IRQ {IRQSC |= 0x04;}
#define CLEAR_IRQ_STATUSREG(retReg) {ABEL_READ(ABEL_reg24, retReg); _asm BSET 2,0x14;}
#define DUMMY_DATA_READ             {uint16_t dummy; ABEL_READ_INT(RX_DATA, dummy); _asm BSET 2,0x14;}


// Macros to store/restore processors status register on stack
#define STOREINTERRUPTS(var)   {__asm TPA; __asm STA var;}
#define RESTOREINTERRUPTS(var) {__asm LDA var; __asm TAP; ISR_ENABLED_0;}
// Alternate way of storing/restoring status register on stack.
// Push/Pull is used, and care must be taken not to mess up the
// stack when using these macros. Compared to STOREINTERRUPTS/
// RESTOREINTERRUPTS the push/pull method results in a small
// decrease in code size, and a small increase in execution
// speed (9 bytes/11 cycles compared to 5 bytes/8 cycles).
#define PUSH_IRQ_STATUS {__asm TPA;  __asm PSHA;}
#define PULL_IRQ_STATUS {__asm PULA; __asm TAP; ISR_ENABLED_0;}

//#define USE_INTERRUPT_RXEOF /* Used if RxEOF interrupt is enabled. Otherwise, GPIO polling is used */
#define USE_INTERRUPT_TXEOF /* Used if TxEOF interrupt is enabled. Otherwise, GPIO polling is used */


#define SMAPI_MLME_SM_DEBUG 0
#define SMAPI_MEM_LOWER_DEBUG 0
#define SMAPI_MEM_CTRL_DEBUG 0
#define SMAPI_SEQ_SUB_COMP_DEBUG 0

//#define MM_DEBUG // Enables debug info in the Memory Manager.
//#define MAC_DEBUG_COUNTERS // Enables additional debug counters in the MAC
//#define BEACON_TX_MASK_DEBUG
//#define MEM_SEQ_HIST_DEBUG_ENABLED // Enables histogram building of MEM-SEQ action setup timing.
//#define MAC_POWER_SAVE_TEST // Enables autodoze test in PTC

/****************************************/
/****** ASSERT Functionality begin ******/

  // Main switch for enabling asserts on target
//#define ENABLE_ASSERTS
  // Print line number, and file name in either LCD
  // display or on COM port
//#define ENABLE_ASSERT_TEXTUAL
  // If defined a CPU breakpoint instruction is created,
  // otherwise a while(1) loop is used to halt the code.
#define ENABLE_ASSERT_BREAKPOINT

  // Asserts that may produce output and will stop the code
#define ASSERT_NONE 0
#define ASSERT_STOP 1
#define ASSERT_INFO 2

  // Module specific assert switches. Undefine or set
  // to ASSERT_NONE to disable asserts for a module.
#define PHY_ASSERT    ASSERT_NONE
#define MAC_ASSERT    ASSERT_STOP
#define SEQ_ASSERT    ASSERT_STOP
#define MEM_ASSERT    ASSERT_STOP
#define ASP_ASSERT    ASSERT_STOP
#define SMAPI_ASSERT  ASSERT_STOP
  // Asserts that may produce output, but does not stop the code
  // Should be used in combination with audio/visual indications.
#define PHY_ASSERT_INFO   ASSERT_NONE
#define MAC_ASSERT_INFO   ASSERT_INFO
#define SEQ_ASSERT_INFO   ASSERT_INFO
#define MEM_ASSERT_INFO   ASSERT_INFO
#define ASP_ASSERT_INFO   ASSERT_INFO
#define SMAPI_ASSERT_INFO ASSERT_INFO

#ifdef ENABLE_ASSERTS
 #ifdef ENABLE_ASSERT_TEXTUAL
  void digiassert(unsigned char *file, unsigned short line);
  void digiassert_info(unsigned char *file, unsigned short line);
  #pragma DISABLE_WARNING(ConditionAlwaysTrue_c)
  #pragma DISABLE_WARNING(ConditionAlwaysFalse_c)
  #define DigiAssert(level, regexp) { if((level==ASSERT_STOP) && ((regexp)==0)) digiassert(__FILE__, __LINE__);\
                                      if((level==ASSERT_INFO) && ((regexp)==0)) digiassert_info(__FILE__, __LINE__);}
 #else
  void digiassert(void);
  void digiassert_info(void);
  #pragma DISABLE_WARNING(ConditionAlwaysTrue_c)
  #pragma DISABLE_WARNING(ConditionAlwaysFalse_c)
  #define DigiAssert(level, regexp){ if((level==ASSERT_STOP) && ((regexp)==0)) digiassert();\
                                     if((level==ASSERT_INFO) && ((regexp)==0)) digiassert_info();}
 #endif  // ENABLE_ASSERT_TEXTUAL
#else
 #define DigiAssert(level, regexp) /* No assert */
#endif
/******  ASSERT Functionality end  ******/
/****************************************/

#define MAXTXLENGTH (127) /* max length of data in TX buffer */
#define MAXRXLENGTH (127) /* max length of data in RX buffer */


#ifdef ENABLETIMING
  #define ENABLE_TIMING_PINS PTADD |= 0x0f;
  #define SETTIMINGPIN_0 PTAD |= 0x01;
  #define SETTIMINGPIN_1 PTAD |= 0x02;
  #define SETTIMINGPIN_2 PTAD |= 0x04;
  #define SETTIMINGPIN_3 PTAD |= 0x08;

  #define CLRTIMINGPIN_0 PTAD &= ~0x01;
  #define CLRTIMINGPIN_1 PTAD &= ~0x02;
  #define CLRTIMINGPIN_2 PTAD &= ~0x04;
  #define CLRTIMINGPIN_3 PTAD &= ~0x08;

  #define TOGGLETIMINGPIN_0 PTAD ^= 0x01;
  #define TOGGLETIMINGPIN_1 PTAD ^= 0x02;
  #define TOGGLETIMINGPIN_2 PTAD ^= 0x04;
  #define TOGGLETIMINGPIN_3 PTAD ^= 0x08;
#else
  #define ENABLE_TIMING_PINS
  #define SETTIMINGPIN_0
  #define SETTIMINGPIN_1
  #define SETTIMINGPIN_2
  #define SETTIMINGPIN_3

  #define CLRTIMINGPIN_0
  #define CLRTIMINGPIN_1
  #define CLRTIMINGPIN_2
  #define CLRTIMINGPIN_3

  #define TOGGLETIMINGPIN_0
  #define TOGGLETIMINGPIN_1
  #define TOGGLETIMINGPIN_2
  #define TOGGLETIMINGPIN_3
#endif ENABLETIMING


#ifdef CODE_PROFILING
  #define CODE_PROFILING_ENABLE_PINS PTADD |= 0x0f;
  #define CODE_PROFILING_SETPIN_0 PTAD |= 0x01;
  #define CODE_PROFILING_SETPIN_1 PTAD |= 0x02;
  #define CODE_PROFILING_SETPIN_2 PTAD |= 0x04;
  #define CODE_PROFILING_SETPIN_3 PTAD |= 0x08;

  #define CODE_PROFILING_CLRPIN_0 PTAD &= ~0x01;
  #define CODE_PROFILING_CLRPIN_1 PTAD &= ~0x02;
  #define CODE_PROFILING_CLRPIN_2 PTAD &= ~0x04;
  #define CODE_PROFILING_CLRPIN_3 PTAD &= ~0x08;

  #define CODE_PROFILING_TGLPIN_0 PTAD ^= 0x01;
  #define CODE_PROFILING_TGLPIN_1 PTAD ^= 0x02;
  #define CODE_PROFILING_TGLPIN_2 PTAD ^= 0x04;
  #define CODE_PROFILING_TGLPIN_3 PTAD ^= 0x08;
#else
  #define CODE_PROFILING_ENABLE_PINS 
  #define CODE_PROFILING_SETPIN_0 
  #define CODE_PROFILING_SETPIN_1 
  #define CODE_PROFILING_SETPIN_2 
  #define CODE_PROFILING_SETPIN_3 

  #define CODE_PROFILING_CLRPIN_0 
  #define CODE_PROFILING_CLRPIN_1 
  #define CODE_PROFILING_CLRPIN_2 
  #define CODE_PROFILING_CLRPIN_3 

  #define CODE_PROFILING_TGLPIN_0 
  #define CODE_PROFILING_TGLPIN_1 
  #define CODE_PROFILING_TGLPIN_2 
  #define CODE_PROFILING_TGLPIN_3 
#endif CODE_PROFILING

  // Used for measuring timing for security
//#define SECURITY_TIMING
#ifdef SECURITY_TIMING
  #define ENABLE_SEC_TIMING_PINS PTADD |= 0x0f;
  #define SEC_SETTIMINGPIN_0 PTAD |= 0x01;
  #define SEC_SETTIMINGPIN_1 PTAD |= 0x02;
  #define SEC_SETTIMINGPIN_2 PTAD |= 0x04;
  #define SEC_SETTIMINGPIN_3 PTAD |= 0x08;

  #define SEC_CLRTIMINGPIN_0 PTAD &= ~0x01;
  #define SEC_CLRTIMINGPIN_1 PTAD &= ~0x02;
  #define SEC_CLRTIMINGPIN_2 PTAD &= ~0x04;
  #define SEC_CLRTIMINGPIN_3 PTAD &= ~0x08;

  #define SEC_TOGGLETIMINGPIN_0 PTAD ^= 0x01;
  #define SEC_TOGGLETIMINGPIN_1 PTAD ^= 0x02;
  #define SEC_TOGGLETIMINGPIN_2 PTAD ^= 0x04;
  #define SEC_TOGGLETIMINGPIN_3 PTAD ^= 0x08;
#else
  #define ENABLE_SEC_TIMING_PINS
  #define SEC_SETTIMINGPIN_0
  #define SEC_SETTIMINGPIN_1
  #define SEC_SETTIMINGPIN_2
  #define SEC_SETTIMINGPIN_3

  #define SEC_CLRTIMINGPIN_0
  #define SEC_CLRTIMINGPIN_1
  #define SEC_CLRTIMINGPIN_2
  #define SEC_CLRTIMINGPIN_3

  #define SEC_TOGGLETIMINGPIN_0
  #define SEC_TOGGLETIMINGPIN_1
  #define SEC_TOGGLETIMINGPIN_2
  #define SEC_TOGGLETIMINGPIN_3
#endif SECURITY_TIMING


#endif _ALL_TARGET_SPECIFIC_H_
