\begin{literatura}{99}

\bibitem{IEEE-comparsion-LFSR-CA}
  Dhingra Sachin.
  \emph{Comparison of LFSR and CA for BIST}.
  Auburn University, USA
  Dostupné z~URL:
  \(<\)\url{http://www.eng.auburn.edu/~agrawvd/COURSE/E7250_05/REPORTS_TERM/Dhingra_LFSR.pdf}\(>\)

\bibitem{IEEE-7803-5092-8/98}
  J. Otterstedt, D. Niggemeyer and T. W. Williams,
  \emph{Detection of CMOS address decoder open faults with March and pseudo random memory tests}
  Test Conference, 1998. Proceedings., International, Washington, DC, 1998, pp. 53-62.

\bibitem{CMOS-VLSI-design}
  Niel H. E. Weste, Davbid Money Harris.
  \emph{CMOS VLSI Design, A circuits and system prespective Forth edition}
  ISBN-10 0-321-54774-8

\bibitem{IEEE-march-tests}
  A. J. Van De Goor, \emph{Using march tests to test SRAMs}, in IEEE Design \& Test of Computers, vol. 10, no. 1, pp. 8-14, March 1993.
  Dostupné z~URL:
  \(<\)\url{http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=\&arnumber=199799\&isnumber=5192}\(>\)

\bibitem{datasheet-intel2102}
  Intel \emph{1024 bit fully decoded static mos random access memory}. 
  Dostupné z~URL:
  \(<\)\url{https://drive.google.com/file/d/0B9rh9tVI0J5mMmZlYWRlMDQtNDYzYS00OWJkLTg4YzYtZDYzMzc5Y2ZlYmVk/view}\(>\)

\bibitem{ieee-march-dof}
  D. Niggemeyer, M. Redeker and J. Otterstedt,
  \emph{Integration of non-classical faults in standard March tests}, Proceedings. International Workshop on Memory Technology, Design and Testing (Cat. No.98TB100236), San Jose, CA, 1998, pp. 91-96.
  Dostupné z~URL:
  \(<\)\url{http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=\&arnumber=705953\&isnumber=15293}\(>\)

\bibitem{memory-testing}
  Arvind Raghuraman, \emph{Walking, marching and galloping patterns for memory tests},
  Dostupné z~URL:
  \(<\)\url{http://www.eng.auburn.edu/~agrawvd/COURSE/E7250_05/REPORTS_TERM/Raghuraman_Mem.doc}\(>\)

\bibitem{march-ss}
  S. Hamdioui, A. J. van de Goor and M. Rodgers,
  \emph{March SS: A Test for All Static Simple RAM Faults}, Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT2002), 2002, pp. 95-100. 
  Dostupné z~URL:
  \(<\)\url{http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=1029769}\(>\)  

\bibitem{ieee-smarch}
  B. Nadeau-Dostie, A. Silburt and V. K. Agarwal,
  \emph{A serial interfacing technique for built-in and external testing of embedded memories}, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference, San Diego, CA, USA, 1989, pp. 22.2/1-22.2/5.
  Dostupné z~URL:
  \(<\)\url{http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5726275&isnumber=2057}\(>\)

\bibitem{tessent-memoryBIST}
  Mentor Graphics Corporation
  \emph{Tessent MemoryBIST User's and Reference Manual v2016.4, December 2016}

\end{literatura}
