proc direction {port inv} {
  if {[string toupper [dict get $port Direction]] == "OUTPUT" ^ $inv == 1} { 
    return {in }
  } { 
    return {out}
  }
}

proc portList {memory inv prefix} {
  set result {}
  foreach {port} $memory { 
    append result "    $prefix" 
    append result [dictGetCI $port Name]
    append result " : "
    append result [direction $port $inv]
    append result " std_logic"
    if {[dictExistsCI $port MSB] == 1} {
      append result "_vector("
      append result [dictGetCI $port MSB]
      if {[dictGetCI $port MSB] > [dictGetCI $port LSB]} {
        append result " downto "
      } {
        append result " to "
      }
      append result [dictGetCI $port LSB]
      append result ")"
    }
    append result ";\n"
  }
  return $result
}

