\begin{tikzpicture}[circuit logic US, scale=0.8]

%Kompatibilita mezi babel a TIKZ |-
\shorthandoff{-}

  \def\N{3}
  \def\POLYNOM{1,0,1} %Prvni 1 se neuvadi

  %Construct DFLOPS in row
  \foreach \m in {1,...,\N}
    \node [shape=dff] (DFF\m) at ( $ 4*(\m-1,0)$ ) {Bit \#\m};

  %Connect to shift register
  \def\p{1}
  \foreach \m in {2,...,\N}{
    \draw [-] (DFF\p.Q) -- (DFF\m.D);
    \global\let\p\m
  }

  % Clock port 
  \path (DFF1) +(-3cm,-2.5cm) coordinate (temp)
    node [anchor=east] {clock};
  \foreach \m in {1,...,\N}
    \draw [-] (temp) -| ($ (DFF\m.CLK) + (-5mm,0) $) --(DFF\m.CLK);

  %XOR
  \def\XORINP{}
  \foreach \m in \POLYNOM{
    \ifthenelse{\equal{\m}{0}}{}{
      \global\edef\XORINP{\XORINP{}n}
    }
  }
  \def\XORINP{nnnn}
  \node [xor gate,inputs={\XORINP} ,point left] (XOR) at (0,-4) {};

  %XOR output
  \draw [-] (XOR.output) -- ++(left:15mm) |- (DFF1.D);

  %Generate feedback connections
  \newcounter{cnt}
  \newcounter{inpcnt}

  \foreach \m in \POLYNOM{
    \addtocounter{cnt}{1}

    \ifthenelse{\equal{\m}{0}}{}{
      \addtocounter{inpcnt}{1}
      \draw [-] (DFF\thecnt.Q) -- ++(right:5mm) |- (XOR.input \theinpcnt);
    }
  }

\end{tikzpicture}
