---------------------------------------------------------------------------
-- File           : ea_top_pa_hw_tester.vhd
-- Author(s)      : Nikola Avramovic
-- Created        : March 11th, 2019
---------------------------------------------------------------------------
-- Description    : 
---------------------------------------------------------------------------

---------------------------------------------------------------------------

library ieee, work;
   use ieee.std_logic_1164.all;
   use ieee.numeric_std.all;
   use work.p_interfaces.all;

entity ea_top_pa_hw_tester is
   Port ( 
      clk         : in  std_logic;
      reset       : in  std_logic;
      -- to/from NIOS II processor
      masteri     : in  TYPE_AVALON_MM_MASTER_TO_SLAVE_ARRAY(1 downto 0); -- for testing will be used for one object gen and one object mon
      mastero     : out TYPE_AVALON_MM_SLAVE_TO_MASTER_ARRAY(1 downto 0); -- for testing will be used for one object gen and one object mon
      -- to/from generator(s)
      generatoro  : out TYPE_AVALON_ST_SOURCE_TO_SINK_ARRAY(0 downto 0);  -- for testing will be used just one module/object
      generatori  : in  TYPE_AVALON_ST_SINK_TO_SOURCE_ARRAY(0 downto 0);  -- for testing will be used just one module/object
      -- to/from monitor(s)
      monitori    : in  TYPE_AVALON_ST_SOURCE_TO_SINK_ARRAY(0 downto 0);   -- for testing will be used just one module/object
      monitoro    : out TYPE_AVALON_ST_SINK_TO_SOURCE_ARRAY(0 downto 0)  -- for testing will be used just one module/object

   );
end entity ea_top_pa_hw_tester;

architecture rtl of ea_top_pa_hw_tester is
begin

   ----------------------------------------------------------------
   -- Object Generators according to the MAC_Qbu desing
   ----------------------------------------------------------------

   object_gen_0: entity work.ea_top_generator
   generic map (
      G_NO_OF_PATT_GEN  => 2 -- TODO: add global parametr for this generic
   ) port map (
      clk               => clk,
      reset             => reset,
      -- to/from NIOS II processor
      masteri           => masteri(0),
      mastero           => mastero(0),
      -- to/from device under test
      duto              => generatoro(0),
      duti              => generatori(0)
   );


   ----------------------------------------------------------------
   -- Object Monitor according to the MAC_Qbu desing
   ----------------------------------------------------------------

   object_mon_0: entity work.ea_top_monitor
   generic map (
      G_NO_OF_PATT_MON  => 2 -- TODO: add global parametr for this generic
   ) port map (
      clk               => clk,
      reset             => reset,
      -- to/from NIOS II processor
      masteri           => masteri(1),
      mastero           => mastero(1),
      -- to/from device under test
      duti              => monitori(0),
      duto              => monitoro(0)
   );

end architecture rtl;