---------------------------------------------------------------------------
-- File           : p_patt_gen_interface.vhd
-- Author(s)      : Nikola Avramovic
-- Created        : March 30th, 2019
---------------------------------------------------------------------------
-- Description    : Port generator internal interfaces
---------------------------------------------------------------------------

---------------------------------------------------------------------------

library ieee;
   use ieee.std_logic_1164.all;
   use ieee.numeric_std.all;
   use work.p_parameters_and_constants.all;
   use work.p_interfaces.all;

package p_port_gen_interface is

   type TYPE_INPUT_MUX_SELECT is (SET_PRIORITY,  SET_FRAG, NONE);

   type TYPE_INPUT_MUX_TO_CONTROL_PORT is record
      sop_priority        : boolean;
      sop_fragment        : boolean;
      priority_end_of_trans : boolean;
      fragment_end_of_trans : boolean;
   end record;

   type TYPE_CONTROL_PORT_TO_INPUT_MUX is record
      input_mux_sel       : TYPE_INPUT_MUX_SELECT;
      priority_input      : natural;
      ready               : boolean;
      send_priority_frame : boolean;
      send_fragment_frame : boolean;
   end record;

   type TYPE_CONTROL_PORT_TO_ETH_OUTPUT is record
      ready               : boolean;
      input_mux_sel       : TYPE_INPUT_MUX_SELECT;
      send_priority_frame : boolean;
      send_fragment_frame : boolean;
      preamble_length     : natural;
      no_of_fragment      : natural;
      packet_crc_en       : boolean;
      terminated          : std_logic_vector(C_AVALON_ST_DATA_WIDTH-1 downto 0);
      sfd                 : std_logic_vector(C_AVALON_ST_DATA_WIDTH-1 downto 0);
      smd_i               : std_logic_vector(C_AVALON_ST_DATA_WIDTH-1 downto 0);
      smd_c               : std_logic_vector(C_AVALON_ST_DATA_WIDTH-1 downto 0);
   end record;

   type TYPE_ETH_OUTPUT_TO_CONTROL_PORT is record
      end_of_packet       : boolean;
   end record;

   type TYPE_INPUT_MUX_TO_ETH_OUTPUT is record
      sop_priority        : boolean;
      sop_fragment        : boolean;
      mux_out             : TYPE_AVALON_ST_SOURCE_TO_SINK;
   end record;

   type TYPE_ETH_OUTPUT_TO_INPUT_MUX is record
      ready               : std_logic;
      eop                 : std_logic;
      data_read_out       : boolean;
   end record;

end package;
