---------------------------------------------------------------------------
-- File           : ea_top_monitor.vhd
-- Author(s)      : Nikola Avramovic
-- Created        : March 11th, 2019
---------------------------------------------------------------------------
-- Description    : PA HW tester top module
---------------------------------------------------------------------------

---------------------------------------------------------------------------
library ieee, work;
   use ieee.std_logic_1164.all;
   use work.p_parameters_and_constants.all;
   use work.p_interfaces.all;
   use work.p_addresses.all;
   use work.p_monitor_interface.all;

entity ea_top_monitor is
   generic (
      G_NO_OF_PATT_MON    : natural  := 2;
      G_PORT_MON_NO       : natural  := 1
   );
   port  (
      clk         : in  std_logic;
      reset       : in  std_logic;
      -- to/from NIOS II processor
      masteri     : in  TYPE_AVALON_MM_MASTER_TO_SLAVE;
      mastero     : out TYPE_AVALON_MM_SLAVE_TO_MASTER;
      -- to/from device under test
      duti        : in  TYPE_AVALON_ST_SOURCE_TO_SINK;
      duto        : out TYPE_AVALON_ST_SINK_TO_SOURCE
   );
end entity ea_top_monitor;

architecture rtl of ea_top_monitor is
   
   -- to/from avalon mm interface
   signal pattern_mon_to_cmd_decoder : TYPE_PATTERN_MON_TO_CMD_DECODER_ARRAY(G_NO_OF_PATT_MON downto 1);
   signal cmd_decoder_to_pattern_mon : TYPE_CMD_DECODER_TO_PATTERN_MON_ARRAY(G_NO_OF_PATT_MON downto 1);
   signal port_mon_to_cmd_decoder    : TYPE_PORT_MON_TO_CMD_DECODER;
   signal cmd_decoder_to_port_mon    : TYPE_CMD_DECODER_TO_PORT_MON;
   -- to/from pattern monitor
   signal pattern_mon_to_port_mon    : TYPE_AVALON_ST_SINK_TO_SOURCE_ARRAY(G_NO_OF_PATT_MON downto 1);
   signal port_mon_to_pattern_mon    : TYPE_AVALON_ST_SOURCE_TO_SINK_ARRAY(G_NO_OF_PATT_MON downto 1);
   -- status signals
   signal pattern_mon_to_status      : TYPE_PATTERN_MON_TO_STATUS_ARRAY(G_NO_OF_PATT_MON downto 1);
   signal port_mon_to_status         : TYPE_PORT_MON_TO_STATUS;
   signal status_to_port_mon         : TYPE_STATUS_TO_PORT_MON;


begin
   
   ----------------------------------------------------------------
   -- Avalon memory map interface is used for storing data into FIFO,
   -- decode cmd, and send into proper module (pattern monitors, port monitor)
   -- and to store errors which occured inside of moduls 
   -- (pattern monitors, port monitor, FIFO, command decoder)
   ----------------------------------------------------------------
   input_mon_i: entity work.ea_avalon_mm_interface_mon
      generic map (
         G_NO_OF_PATT_MON  => G_NO_OF_PATT_MON,
         G_PORT_MON_NO     => G_PORT_MON_NO
      ) port map (
         clk               => clk,
         reset             => reset,
         masteri           => masteri,
         mastero           => mastero,
         pattern_moni      => pattern_mon_to_cmd_decoder,
         pattern_mono      => cmd_decoder_to_pattern_mon,
         port_moni         => port_mon_to_cmd_decoder,
         port_mono         => cmd_decoder_to_port_mon,
         pattern_statusi   => pattern_mon_to_status,
         port_statusi      => port_mon_to_status,
         port_statuso      => status_to_port_mon
      );

   ----------------------------------------------------------------
   -- Pattern monitor
   ----------------------------------------------------------------
   m: for i in 1 to G_NO_OF_PATT_MON generate
   begin
      pattern_mon_i: entity work.ea_pattern_mon
         generic map (
            G_PATTERN_MON_NO   => i
         ) port map (
            clk                => clk,
            reset              => reset,
            cmd_decoderi       => cmd_decoder_to_pattern_mon(i),
            cmd_decodero       => pattern_mon_to_cmd_decoder(i),
            port_moni          => port_mon_to_pattern_mon(i),
            port_mono          => pattern_mon_to_port_mon(i),
            statuso            => pattern_mon_to_status(i)
         );
   end generate;

   ----------------------------------------------------------------
   -- Port monitor
   ----------------------------------------------------------------
   port_mon_i: entity work.ea_port_mon
      generic map (
         G_NO_OF_PATT_MON  => G_NO_OF_PATT_MON,
         G_PORT_MON_NO     => G_PORT_MON_NO
      ) port map (
         clk               => clk,
         reset             => reset,
         cmd_decoderi      => cmd_decoder_to_port_mon,
         cmd_decodero      => port_mon_to_cmd_decoder,
         pattern_moni      => pattern_mon_to_port_mon,
         pattern_mono      => port_mon_to_pattern_mon,
         duti              => duti,
         duto              => duto,
         statusi           => status_to_port_mon,
         statuso           => port_mon_to_status
      );
   
end architecture rtl;       



