library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

	 entity ent_parser_krabicka is
        generic
        (
            pociatok_adresovania                            : integer := 1000000
        );

        port
        (
            --riadenie hodinami
            parser_CLK                              : in    std_logic;
            --asynchronny reset
            parser_RESET                            : in    std_logic;

            --vstupny FrameLink
            parser_INPUT_SOF_N                      : in    std_logic;
            parser_INPUT_SOP_N                      : in    std_logic;
            parser_INPUT_EOP_N                      : in    std_logic;
            parser_INPUT_EOF_N                      : in    std_logic;
            parser_INPUT_SRC_RDY_N                  : in    std_logic;
            parser_INPUT_DST_RDY_N                  : out   std_logic;
            parser_INPUT_DATA                       : in    std_logic_vector ( 63 downto 0 );
            parser_INPUT_DREM                       : in    std_logic_vector (  2 downto 0 );
            --vystupny FrameLink
            parser_OUTPUT_SOF_N                     : out   std_logic;
            parser_OUTPUT_SOP_N                     : out   std_logic;
            parser_OUTPUT_EOP_N                     : out   std_logic;
            parser_OUTPUT_EOF_N                     : out   std_logic;
            parser_OUTPUT_SRC_RDY_N                 : out   std_logic;
            parser_OUTPUT_DST_RDY_N                 : in    std_logic;
            parser_OUTPUT_DATA                      : out   std_logic_vector ( 63 downto 0 );
            parser_OUTPUT_DREM                      : out   std_logic_vector (  2 downto 0 );
            --zbernica MI32 vchadzajuca do krabicky
            parser_MI32_DWR                        : in    std_logic_vector(31 downto 0);
            parser_MI32_ADDR                       : in    std_logic_vector(31 downto 0);
            parser_MI32_RD                         : in    std_logic;
            parser_MI32_WR                         : in    std_logic;
            parser_MI32_BE                         : in    std_logic_vector(3 downto 0);
            parser_MI32_DRD                        : out   std_logic_vector(31 downto 0);
            parser_MI32_ARDY                       : out   std_logic;
            parser_MI32_DRDY                       : out   std_logic

        );
    end entity ent_parser_krabicka;


    architecture krabicka_pokus_1 of ent_parser_krabicka is

        begin
        --faza cislo 1, priame prepojenie bez dalsej funkcionality
        parser_OUTPUT_SOF_N     <= parser_INPUT_SOF_N;
        parser_OUTPUT_SOP_N     <= parser_INPUT_SOP_N;
        parser_OUTPUT_EOP_N     <= parser_INPUT_EOP_N;
        parser_OUTPUT_EOF_N     <= parser_INPUT_EOF_N;
        parser_OUTPUT_SRC_RDY_N <= parser_INPUT_SRC_RDY_N;
         parser_INPUT_DST_RDY_N <= parser_OUTPUT_DST_RDY_N;
        parser_OUTPUT_DATA      <= parser_INPUT_DATA;
        parser_OUTPUT_DREM      <= parser_INPUT_DREM;


    end architecture krabicka_pokus_1;
