/*
 * uart_drv.h
 *
 * Created: 27.2.2016 12:41:45
 *  Author: Chenda
 */ 


#ifndef UART_DRV_H_
#define UART_DRV_H_

#include <avr/io.h>
/************************************************************************/
/*  UART 1 macros default: asynchronous mode, parity none, 1-stop bit   */
/************************************************************************/
#define mUart1TransX2()			UCSR1A|=(1<<U2X1)
#define mUart1TransX1()			UCSR1A&=~(1<<U2X1)
#define mUart1Rx_Enab()			UCSR1B|=(1<<RXEN1)
#define mUart1Rx_Dis()			UCSR1B&=~(1<<RXEN1)
#define mUart1Tx_Enab()			UCSR1B|=(1<<TXEN1)
#define mUart1Tx_Dis()			UCSR1B&=~(1<<TXEN1)
#define mUart1IntRx_Enab()		UCSR1B|=(1<<RXCIE1)
#define mUart1IntRx_Dis()		UCSR1B&=~(1<<RXCIE1)
#define mUart1IntTx_Enab()		UCSR1B|=(1<<TXCIE1)
#define mUart1IntTx_Dis()		UCSR1B&=~(1<<TXCIE1)
#define mUart1TxFlag_Clr()		UCSR1A|=(1<<TXC1)
#define mUart1IntUdrEmp_Enab()	UCSR1B|=(1<<UDRIE1)
#define mUart1IntUdrEmp_Dis()	UCSR1B&=~(1<<UDRIE1)
#define mUart1NoBit_8()			UCSR1C&=~(3<<UCSZ10);UCSR1B&=~(1<<UCSZ12);UCSR1C|=(3<<UCSZ10)
#define mUart1BaudRate(l,h)		UBRR1L=l;UBRR1H=h&0xF

/************************************************************************/
/* Timer/counter 1 macros                                               */
/************************************************************************/
#define mTimer1Mode_CTC()		TCCR1A&=~(3<<WGM10);TCCR1B&=~(3<<WGM12);TCCR1B|=(1<<WGM12)		//  pocita do hodnoty OCRnA registru a pak se vynuluje
#define mTimer1Mode_NORM()		TCCR1A&=~(3<<WGM10);TCCR1B&=~(3<<WGM12)							//  pocita do hodnoty 0xFFFF a pak se nuluje
#define mTimer1Stop()			TCCR1B&=~(7<<CS10)
#define mTimer1Run_Clk_1()		TCCR1B|=(0<<CS12)|(0<<CS11)|(1<<CS10)
#define mTimer1Run_Clk_8()		TCCR1B|=(0<<CS12)|(1<<CS11)|(0<<CS10)
#define mTimer1Run_Clk_64()		TCCR1B|=(0<<CS12)|(1<<CS11)|(1<<CS10)
#define mTimer1Run_Clk_256()	TCCR1B|=(1<<CS12)|(0<<CS11)|(0<<CS10)
#define mTimer1Run_Clk_1024()	TCCR1B|=(1<<CS12)|(0<<CS11)|(1<<CS10)
#define mTimer1Clear()			TCNT1H=0;TCNT1L=0							//  pri zapisu do TCNTn se nejdrive zapisuje do TCNTnH a az pote do TCNTnL, pri cteni naopak
#define mTimer1CompReg_Upd(x)	OCR1AH=((uint8_t)(x>>8));OCR1AL=((uint8_t)x)
#define mTimer1IntOvf_Enab()	TIMSK1|=(1<<TOIE1)							//  for normal mode
#define mTimer1IntOvf_Clear()	TIFR1|=(1<<TOV1)							//  for normal mode
#define mTimer1IntOvf_Dis()		TIMSK1&=~(1<<TOIE1)							//  for normal mode
#define mTimer1IntOcrA_Enab()	TIMSK1|=(1<<OCIE1A)
#define mTimer1IntOcrA_Clear()	TIFR1|=(1<<OCF1A)
#define mTimer1IntOcrA_Dis()	TIMSK1&=~(1<<OCIE1A)
#define mTimer1IntOcrB_Enab()	TIMSK1|=(1<<OCIE1B)
#define mTimer1IntOcrB_Clear()	TIFR1|=(1<<OCF1B)
#define mTimer1IntOcrB_Dis()	TIMSK1&=~(1<<OCIE1B)
#define mTimer1IntOcrC_Enab()	TIMSK1|=(1<<OCIE1C)
#define mTimer1IntOcrC_Clear()	TIFR1|=(1<<OCF1C)
#define mTimer1IntOcrC_Dis()	TIMSK1&=~(1<<OCIE1C)


/************************************************************************/
/* UART functions                                                       */
/************************************************************************/


#endif /* UART_DRV_H_ */