----------------------------------------------------------------------------------
-- Generates 1 kHz clock enable signal from 50 MHz clock
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
----------------------------------------------------------------------------------
ENTITY Timing IS
  PORT( Clk:       IN  STD_LOGIC;
        --StoHzEn:   OUT STD_LOGIC;
        KHzEn:     OUT STD_LOGIC;
		  --eightKHzEn:OUT STD_LOGIC;
		  --stoKHzEn:	 OUT STD_LOGIC;
		  TickEn:	 OUT STD_LOGIC);
END Timing;
----------------------------------------------------------------------------------
ARCHITECTURE Behavioral OF Timing IS
  SIGNAL mhertz_count:      STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0'); --   0-199 ->  6b
  SIGNAL tick_count:        STD_LOGIC_VECTOR(8 DOWNTO 0) := (OTHERS => '0'); --   0-399 ->  9b
  SIGNAL khertz_count:      STD_LOGIC_VECTOR(9 DOWNTO 0) := (OTHERS => '0'); --   0-999 -> 10b
  SIGNAL stohertz_count:    STD_LOGIC_VECTOR(3 DOWNTO 0) := (OTHERS => '0'); --   0-9   ->  4b
  SIGNAL stoKHz_count:      STD_LOGIC_VECTOR(9 DOWNTO 0) := (OTHERS => '0'); --   0-999 -> 10b
  SIGNAL eightKHz_count:    STD_LOGIC_VECTOR(6 DOWNTO 0) := (OTHERS => '0'); --   0-124 ->  7b

  SIGNAL mhertz_en:         STD_LOGIC := '0';
  SIGNAL tick_en:       	 STD_LOGIC := '0';
  SIGNAL khertz_en:         STD_LOGIC := '0';
  SIGNAL stohertz_en:       STD_LOGIC := '0';
  SIGNAL eightKHz_en: 		 STD_LOGIC := '0';
  SIGNAL stoKHz_en: 			 STD_LOGIC := '0';
  
  --------------------------------------------------------------------------------
BEGIN
  --------------------------------------------------------------------------------
  -- generates a 1 MHz signal from a 100 MHz signal - mhertz_en
  PROCESS (clk) BEGIN
    IF clk'event AND clk = '1' THEN
      mhertz_count <= mhertz_count + 1;
      IF mhertz_count = "11000111" THEN       -- 199
        mhertz_en <= '1';
        mhertz_count <= (OTHERS => '0');
      ELSE
        mhertz_en <= '0';
      END IF;
    END IF;
  END PROCESS;
  
  --------------------------------------------------------------------------------
  -- generates a 250 kHz signal from a 100 MHz signal - tick_en
  PROCESS (clk) BEGIN
     IF clk'event AND clk = '1' THEN
	   tick_count <= tick_count + 1;
      IF tick_count = "110001111" THEN       -- clock enable 399
        tick_en <= '1';
		  tick_count <= (OTHERS => '0');
		ELSE
		  tick_en <= '0';
		end if;
     END IF;
  END PROCESS;
  
  
  --------------------------------------------------------------------------------
  -- generates a 100 kHz signal from a 100 MHz signal - stoKHz_en
  PROCESS (clk) BEGIN
     IF clk'event AND clk = '1' THEN
	   stoKHz_count <= stoKHz_count + 1;
      IF stoKHz_count = "1111100111" THEN       -- clock enable 999
        stoKHz_en <= '1';
		  stoKHz_count <= (OTHERS => '0');
		ELSE
		  stoKHz_en <= '0';
		end if;
     END IF;
  END PROCESS;
  
  --------------------------------------------------------------------------------
  -- generates a 8 kHz signal from a 1 MHz signal - eightKHz_en
  PROCESS (clk) BEGIN
    IF clk'event AND clk = '1' THEN
      IF mhertz_en = '1' THEN       -- clock enable
        eightKHz_count <= eightKHz_count + 1;
        IF eightKHz_count = "1111100" THEN     -- 124
          eightKHz_en <= '1';
          eightKHz_count <= (OTHERS => '0');
        ELSE
          eightKHz_en <= '0';
        END IF;

      ELSE
        eightKHz_en <= '0';
      END IF;
    END IF;
  END PROCESS;  
  

  --------------------------------------------------------------------------------
  -- generates a 1 kHz signal from a 1 MHz signal - khertz_en
  PROCESS (clk) BEGIN
    IF clk'event AND clk = '1' THEN
      IF mhertz_en = '1' THEN       -- clock enable
        khertz_count <= khertz_count + 1;
        IF khertz_count = "1111100111" THEN     -- 999
          khertz_en <= '1';
          khertz_count <= (OTHERS => '0');
        ELSE
          khertz_en <= '0';
        END IF;

      ELSE
        khertz_en <= '0';
      END IF;
    END IF;
  END PROCESS;

  --------------------------------------------------------------------------------
  -- generates a 100 Hz signal from a 1 kHz signal - stohertz_en
  PROCESS (clk) BEGIN
    IF clk'event AND clk = '1' THEN
      IF khertz_en = '1' THEN       -- clock enable

        stohertz_count <= stohertz_count + 1;
        IF stohertz_count = "1001" THEN     -- 9
          stohertz_en <= '1';
          stohertz_count <= (OTHERS => '0');
        ELSE
          stohertz_en <= '0';
        END IF;

      ELSE
        stohertz_en <= '0';
      END IF;
    END IF;
  END PROCESS;

  --------------------------------------------------------------------------------

  KHzEn 			<= khertz_en;
  --eightKHzEn 	<= eightKHz_en;
  --stoKHzEn 		<= stoKHz_en;
  --StoHzEn 		<= stohertz_en;
  TickEn 		<= tick_en;	
----------------------------------------------------------------------------------
END Behavioral;
----------------------------------------------------------------------------------
