RAINHA GODOY SANTIAGO, O. Implementation of Tetris Game on a FPGA [online]. Brno: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. 2025.
The bachelor thesis deals with the hardware implementation of the classic Tetris game on an FPGA platform using VHDL. The objective was to design a modular architecture that operates entirely in hardware, incorporating video output via VGA, user interaction through push buttons, and game control logic implemented as a finite state machine. The work was carried out on the Xilinx Spartan-3 development board and resulted in a functional prototype that runs in real time, without the use of any embedded processor. From a technical standpoint, the thesis is solid and demonstrates the student's ability to apply digital design techniques in a practical setting. The project includes pseudo-random number generation (via an LFSR), game logic control using a state machine, on-screen rendering through object-mapped VGA logic, collision detection, memory management using block RAM, and a custom debouncing mechanism for button inputs. The system design is cleanly modularized and shows an understanding of synchronization and resource-efficient hardware design. It is important to note that the student completed this project in approximately three months—a relatively short period for implementing a complete hardware game system from scratch. Despite this time constraint, the student managed to deliver a working implementation and covered all core building blocks of the system. This speaks to the student’s strong technical commitment and ability to work under pressure. However, several limitations remain. The implementation lacks key features typical of a complete Tetris game, most notably the ability to rotate pieces, a scoring system, and detection of the game-over condition. These features were omitted most likely due to time constraints, but their absence makes the implementation feel more like a functional demo than a finished product. Additionally, the thesis does not include post-synthesis analysis such as resource utilization, timing reports, or performance evaluation, which are essential in FPGA-based projects. Formally, the thesis is generally well-structured and readable. The student’s English is clear and mostly correct, though occasionally repetitive and overly verbose in the explanation of standard concepts. The use of code-style identifiers (e.g., signal names in all caps) within running text could have been avoided for better readability. The diagrams and figures support the explanation effectively, although the bibliography could benefit from improved formatting and source selection. In conclusion, the thesis fulfills its main goals and clearly demonstrates the student’s capability in hardware design using VHDL. Considering the technical complexity of the task and the short timeframe available, the outcome is commendable. Still, the absence of advanced game features and analytical evaluation prevents the work from reaching the highest mark. Nevertheless, it remains a technically valuable and well-executed project.
This thesis deals with the implementation of the popular game Tetris on FPGA, specifically the Xilinx Spartan-3 kit. The student provides a comprehensive description of the hardware, including not only the Spartan-3 development kit itself, but also the VGA standard. In accordance with the assignment, the student designed an implementation of the popular game in VHDL; the description of the implementation constitutes a substantial part of the text and is very detailed, including, for example, a solution for debouncing button inputs. The thesis is 59 pages long, which slightly exceeds the recommended length for a bachelor's thesis. In terms of presentation, the thesis is of a very good standard, the text is well structured and therefore easy to read. The proposed program blocks are commented on in detail. From a formal point of view, the text also meets the requirements for a bachelor's thesis. However, I would like to see an example of the implementation output, i.e. how the Tetris application looks and works on the given kit. I consider the assignment to be fulfilled, as the student has demonstrated their skills in VHDL design. In view of the above, I give a score of 85 points.
eVSKP id 169690