<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<EDKSYSTEM EDWVERSION="1.2" TIMESTAMP="Wed Apr  4 09:11:14 2018" VIVADOVERSION="2017.4">

  <SYSTEMINFO ARCH="zynq" BOARD="myir.com:mys-7z020:part0:2.1" DEVICE="7z020" NAME="design_1" PACKAGE="clg400" SPEEDGRADE="-1"/>

  <EXTERNALPORTS/>

  <EXTERNALINTERFACES/>

  <MODULES>
    <MODULE FULLNAME="/eig_qr_balanced_0" HWVERSION="1.0" INSTANCE="eig_qr_balanced_0" IPTYPE="PERIPHERAL" IS_ENABLE="1" MODCLASS="PERIPHERAL" MODTYPE="eig_qr_balanced" VLNV="xilinx.com:hls:eig_qr_balanced:1.0">
      <DOCUMENTS/>
      <ADDRESSBLOCKS>
        <ADDRESSBLOCK ACCESS="read-write" INTERFACE="s_axi_AXILiteS" NAME="Reg" RANGE="65536" USAGE="register">
          <REGISTERS>
            <REGISTER NAME="CTRL">
              <PROPERTY NAME="DESCRIPTION" VALUE="Control signals"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="0"/>
              <PROPERTY NAME="SIZE" VALUE="32"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
              <FIELDS>
                <FIELD NAME="AP_START">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Control signal Register for 'ap_start'."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="0"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-write"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE="modify"/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE=""/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="0"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="AP_DONE">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Control signal Register for 'ap_done'."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="1"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE=""/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="1"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="AP_IDLE">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Control signal Register for 'ap_idle'."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="2"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE=""/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="2"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="AP_READY">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Control signal Register for 'ap_ready'."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="3"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE=""/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="3"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="RESERVED_1">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Reserved.  0s on read."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="4"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE=""/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="4"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="3"/>
                </FIELD>
                <FIELD NAME="AUTO_RESTART">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Control signal Register for 'auto_restart'."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="7"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-write"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE="modify"/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE=""/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="7"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="RESERVED_2">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Reserved.  0s on read."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="8"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE=""/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="8"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="24"/>
                </FIELD>
              </FIELDS>
            </REGISTER>
            <REGISTER NAME="GIER">
              <PROPERTY NAME="DESCRIPTION" VALUE="Global Interrupt Enable Register"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="4"/>
              <PROPERTY NAME="SIZE" VALUE="32"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
              <FIELDS>
                <FIELD NAME="Enable">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Master enable for the device interrupt output to the system interrupt controller: 0 = Disabled, 1 = Enabled"/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="0"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-write"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE="modify"/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE=""/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="0"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="RESERVED">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Reserved.  0s on read."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="1"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE=""/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="1"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="31"/>
                </FIELD>
              </FIELDS>
            </REGISTER>
            <REGISTER NAME="IP_IER">
              <PROPERTY NAME="DESCRIPTION" VALUE="IP Interrupt Enable Register"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="8"/>
              <PROPERTY NAME="SIZE" VALUE="32"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
              <FIELDS>
                <FIELD NAME="CHAN0_INT_EN">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Enable Channel 0 (ap_done) Interrupt.  0 = Disabled, 1 = Enabled."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="0"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-write"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE="modify"/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE=""/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="0"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="CHAN1_INT_EN">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Enable Channel 1 (ap_ready) Interrupt.  0 = Disabled, 1 = Enabled."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="1"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-write"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE="modify"/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE=""/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="1"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="RESERVED">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Reserved.  0s on read."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="2"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE=""/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="2"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="30"/>
                </FIELD>
              </FIELDS>
            </REGISTER>
            <REGISTER NAME="IP_ISR">
              <PROPERTY NAME="DESCRIPTION" VALUE="IP Interrupt Status Register"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="12"/>
              <PROPERTY NAME="SIZE" VALUE="32"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
              <FIELDS>
                <FIELD NAME="CHAN0_INT_ST">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Channel 0 (ap_done) Interrupt Status. 0 = No Channel 0 input interrupt, 1 = Channel 0 input interrup"/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="0"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE="oneToToggle"/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="0"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="CHAN1_INT_ST">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Channel 1 (ap_ready) Interrupt Status. 0 = No Channel 1 input interrupt, 1 = Channel 1 input interrup"/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="1"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE="oneToToggle"/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="1"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="1"/>
                </FIELD>
                <FIELD NAME="RESERVED">
                  <PROPERTY NAME="DESCRIPTION" VALUE="Reserved.  0s on read."/>
                  <PROPERTY NAME="ADDRESS_OFFSET" VALUE="2"/>
                  <PROPERTY NAME="ACCESS" VALUE="read-only"/>
                  <PROPERTY NAME="MODIFIED_READ_VALUES" VALUE=""/>
                  <PROPERTY NAME="WRITE_CONSTRAINT" VALUE="0"/>
                  <PROPERTY NAME="READ_ACTION" VALUE="modify"/>
                  <PROPERTY NAME="BIT_OFFSET" VALUE="2"/>
                  <PROPERTY NAME="BIT_WIDTH" VALUE="30"/>
                </FIELD>
              </FIELDS>
            </REGISTER>
            <REGISTER NAME="Memory_A_re">
              <PROPERTY NAME="DESCRIPTION" VALUE="Memory A_re"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="64"/>
              <PROPERTY NAME="SIZE" VALUE="64"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
            </REGISTER>
            <REGISTER NAME="Memory_A_im">
              <PROPERTY NAME="DESCRIPTION" VALUE="Memory A_im"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="128"/>
              <PROPERTY NAME="SIZE" VALUE="64"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
            </REGISTER>
            <REGISTER NAME="Memory_U_re">
              <PROPERTY NAME="DESCRIPTION" VALUE="Memory U_re"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="192"/>
              <PROPERTY NAME="SIZE" VALUE="64"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
            </REGISTER>
            <REGISTER NAME="Memory_U_im">
              <PROPERTY NAME="DESCRIPTION" VALUE="Memory U_im"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="256"/>
              <PROPERTY NAME="SIZE" VALUE="64"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
            </REGISTER>
            <REGISTER NAME="Memory_v_re">
              <PROPERTY NAME="DESCRIPTION" VALUE="Memory v_re"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="320"/>
              <PROPERTY NAME="SIZE" VALUE="16"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
            </REGISTER>
            <REGISTER NAME="Memory_v_im">
              <PROPERTY NAME="DESCRIPTION" VALUE="Memory v_im"/>
              <PROPERTY NAME="ADDRESS_OFFSET" VALUE="336"/>
              <PROPERTY NAME="SIZE" VALUE="16"/>
              <PROPERTY NAME="ACCESS" VALUE="read-write"/>
              <PROPERTY NAME="IS_ENABLED" VALUE="true"/>
              <PROPERTY NAME="RESET_VALUE" VALUE="0"/>
            </REGISTER>
          </REGISTERS>
        </ADDRESSBLOCK>
      </ADDRESSBLOCKS>
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_AXILITES_ADDR_WIDTH" VALUE="9"/>
        <PARAMETER NAME="C_S_AXI_AXILITES_DATA_WIDTH" VALUE="32"/>
        <PARAMETER NAME="Component_Name" VALUE="design_1_eig_qr_balanced_0_0"/>
        <PARAMETER NAME="clk_period" VALUE="4"/>
        <PARAMETER NAME="machine" VALUE="64"/>
        <PARAMETER NAME="combinational" VALUE="0"/>
        <PARAMETER NAME="latency" VALUE="14611"/>
        <PARAMETER NAME="II" VALUE="x"/>
        <PARAMETER NAME="EDK_IPTYPE" VALUE="PERIPHERAL"/>
        <PARAMETER NAME="C_S_AXI_AXILITES_BASEADDR" VALUE="0x43C00000"/>
        <PARAMETER NAME="C_S_AXI_AXILITES_HIGHADDR" VALUE="0x43C0FFFF"/>
      </PARAMETERS>
      <PORTS>
        <PORT DIR="I" LEFT="8" NAME="s_axi_AXILiteS_AWADDR" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_AWADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_awaddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_AXILiteS_AWVALID" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_AWVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_awvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_AXILiteS_AWREADY" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_AWREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_awready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="s_axi_AXILiteS_WDATA" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_WDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_wdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="s_axi_AXILiteS_WSTRB" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_WSTRB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_wstrb"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_AXILiteS_WVALID" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_WVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_wvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_AXILiteS_WREADY" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_WREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_wready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="s_axi_AXILiteS_BRESP" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_BRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_bresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_AXILiteS_BVALID" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_BVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_bvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_AXILiteS_BREADY" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_BREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_bready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="8" NAME="s_axi_AXILiteS_ARADDR" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_ARADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_araddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_AXILiteS_ARVALID" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_ARVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_arvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_AXILiteS_ARREADY" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_ARREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_arready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="s_axi_AXILiteS_RDATA" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_RDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_rdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="s_axi_AXILiteS_RRESP" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_RRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_rresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_AXILiteS_RVALID" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_RVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_rvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_AXILiteS_RREADY" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_RREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_AXI_rready"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="50000000" DIR="I" NAME="ap_clk" SIGIS="clk" SIGNAME="processing_system7_0_FCLK_CLK0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="FCLK_CLK0"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="ap_rst_n" SIGIS="rst" SIGNAME="rst_ps7_0_50M_peripheral_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="rst_ps7_0_50M" PORT="peripheral_aresetn"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="interrupt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT"/>
      </PORTS>
      <BUSINTERFACES>
        <BUSINTERFACE BUSNAME="ps7_0_axi_periph_M00_AXI" DATAWIDTH="32" NAME="s_axi_AXILiteS" TYPE="SLAVE" VLNV="xilinx.com:interface:aximm:1.0">
          <PARAMETER NAME="ADDR_WIDTH" VALUE="9"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
          <PARAMETER NAME="PROTOCOL" VALUE="AXI4LITE"/>
          <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
          <PARAMETER NAME="LAYERED_METADATA" VALUE="xilinx.com:interface:datatypes:1.0 {CLK {datatype {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value {}} bitwidth {attribs {resolve_type immediate dependency {} format long minimum {} maximum {}} value 1} bitoffset {attribs {resolve_type immediate dependency {} format long minimum {} maximum {}} value 0}}}}"/>
          <PARAMETER NAME="FREQ_HZ" VALUE="50000000"/>
          <PARAMETER NAME="ID_WIDTH" VALUE="0"/>
          <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="HAS_BURST" VALUE="0"/>
          <PARAMETER NAME="HAS_LOCK" VALUE="0"/>
          <PARAMETER NAME="HAS_PROT" VALUE="0"/>
          <PARAMETER NAME="HAS_CACHE" VALUE="0"/>
          <PARAMETER NAME="HAS_QOS" VALUE="0"/>
          <PARAMETER NAME="HAS_REGION" VALUE="0"/>
          <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
          <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
          <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="0"/>
          <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="1"/>
          <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="1"/>
          <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="1"/>
          <PARAMETER NAME="PHASE" VALUE="0.000"/>
          <PARAMETER NAME="CLK_DOMAIN" VALUE="design_1_processing_system7_0_0_FCLK_CLK0"/>
          <PARAMETER NAME="NUM_READ_THREADS" VALUE="4"/>
          <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="4"/>
          <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="s_axi_AXILiteS_AWADDR"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="s_axi_AXILiteS_AWVALID"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="s_axi_AXILiteS_AWREADY"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="s_axi_AXILiteS_WDATA"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="s_axi_AXILiteS_WSTRB"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="s_axi_AXILiteS_WVALID"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="s_axi_AXILiteS_WREADY"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="s_axi_AXILiteS_BRESP"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="s_axi_AXILiteS_BVALID"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="s_axi_AXILiteS_BREADY"/>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="s_axi_AXILiteS_ARADDR"/>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="s_axi_AXILiteS_ARVALID"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="s_axi_AXILiteS_ARREADY"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="s_axi_AXILiteS_RDATA"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="s_axi_AXILiteS_RRESP"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="s_axi_AXILiteS_RVALID"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="s_axi_AXILiteS_RREADY"/>
          </PORTMAPS>
        </BUSINTERFACE>
      </BUSINTERFACES>
    </MODULE>
    <MODULE CONFIGURABLE="TRUE" FULLNAME="/processing_system7_0" HWVERSION="5.5" INSTANCE="processing_system7_0" IPTYPE="PERIPHERAL" IS_ENABLE="1" IS_PL="FALSE" MODTYPE="processing_system7" VLNV="xilinx.com:ip:processing_system7:5.5">
      <DOCUMENTS>
        <DOCUMENT SOURCE="http://www.xilinx.com/cgi-bin/docs/ipdoc?c=processing_system7;v=v5_3;d=pg082-processing-system7.pdf"/>
      </DOCUMENTS>
      <PARAMETERS>
        <PARAMETER NAME="C_EN_EMIO_PJTAG" VALUE="0"/>
        <PARAMETER NAME="C_EN_EMIO_ENET0" VALUE="0"/>
        <PARAMETER NAME="C_EN_EMIO_ENET1" VALUE="0"/>
        <PARAMETER NAME="C_EN_EMIO_TRACE" VALUE="0"/>
        <PARAMETER NAME="C_INCLUDE_TRACE_BUFFER" VALUE="0"/>
        <PARAMETER NAME="C_TRACE_BUFFER_FIFO_SIZE" VALUE="128"/>
        <PARAMETER NAME="USE_TRACE_DATA_EDGE_DETECTOR" VALUE="0"/>
        <PARAMETER NAME="C_TRACE_PIPELINE_WIDTH" VALUE="8"/>
        <PARAMETER NAME="C_TRACE_BUFFER_CLOCK_DELAY" VALUE="12"/>
        <PARAMETER NAME="C_EMIO_GPIO_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_INCLUDE_ACP_TRANS_CHECK" VALUE="0"/>
        <PARAMETER NAME="C_USE_DEFAULT_ACP_USER_VAL" VALUE="0"/>
        <PARAMETER NAME="C_S_AXI_ACP_ARUSER_VAL" VALUE="31"/>
        <PARAMETER NAME="C_S_AXI_ACP_AWUSER_VAL" VALUE="31"/>
        <PARAMETER NAME="C_M_AXI_GP0_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="C_M_AXI_GP0_ENABLE_STATIC_REMAP" VALUE="0"/>
        <PARAMETER NAME="C_M_AXI_GP1_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="C_M_AXI_GP1_ENABLE_STATIC_REMAP" VALUE="0"/>
        <PARAMETER NAME="C_S_AXI_GP0_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_GP1_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_ACP_ID_WIDTH" VALUE="3"/>
        <PARAMETER NAME="C_S_AXI_HP0_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_HP0_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_S_AXI_HP1_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_HP1_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_S_AXI_HP2_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_HP2_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_S_AXI_HP3_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_HP3_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_M_AXI_GP0_THREAD_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="C_M_AXI_GP1_THREAD_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="C_NUM_F2P_INTR_INPUTS" VALUE="1"/>
        <PARAMETER NAME="C_IRQ_F2P_MODE" VALUE="DIRECT"/>
        <PARAMETER NAME="C_DQ_WIDTH" VALUE="32"/>
        <PARAMETER NAME="C_DQS_WIDTH" VALUE="4"/>
        <PARAMETER NAME="C_DM_WIDTH" VALUE="4"/>
        <PARAMETER NAME="C_MIO_PRIMITIVE" VALUE="54"/>
        <PARAMETER NAME="C_TRACE_INTERNAL_WIDTH" VALUE="2"/>
        <PARAMETER NAME="C_USE_AXI_NONSECURE" VALUE="0"/>
        <PARAMETER NAME="C_USE_M_AXI_GP0" VALUE="1"/>
        <PARAMETER NAME="C_USE_M_AXI_GP1" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_GP0" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_GP1" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_HP0" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_HP1" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_HP2" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_HP3" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_ACP" VALUE="0"/>
        <PARAMETER NAME="C_PS7_SI_REV" VALUE="PRODUCTION"/>
        <PARAMETER NAME="C_FCLK_CLK0_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="C_FCLK_CLK1_BUF" VALUE="FALSE"/>
        <PARAMETER NAME="C_FCLK_CLK2_BUF" VALUE="FALSE"/>
        <PARAMETER NAME="C_FCLK_CLK3_BUF" VALUE="FALSE"/>
        <PARAMETER NAME="C_PACKAGE_NAME" VALUE="clg400"/>
        <PARAMETER NAME="C_GP0_EN_MODIFIABLE_TXN" VALUE="1"/>
        <PARAMETER NAME="C_GP1_EN_MODIFIABLE_TXN" VALUE="1"/>
        <PARAMETER NAME="PCW_DDR_RAM_BASEADDR" VALUE="0x00100000"/>
        <PARAMETER NAME="PCW_DDR_RAM_HIGHADDR" VALUE="0x3FFFFFFF"/>
        <PARAMETER NAME="PCW_UART0_BASEADDR" VALUE="0xE0000000"/>
        <PARAMETER NAME="PCW_UART0_HIGHADDR" VALUE="0xE0000FFF"/>
        <PARAMETER NAME="PCW_UART1_BASEADDR" VALUE="0xE0001000"/>
        <PARAMETER NAME="PCW_UART1_HIGHADDR" VALUE="0xE0001FFF"/>
        <PARAMETER NAME="PCW_I2C0_BASEADDR" VALUE="0xE0004000"/>
        <PARAMETER NAME="PCW_I2C0_HIGHADDR" VALUE="0xE0004FFF"/>
        <PARAMETER NAME="PCW_I2C1_BASEADDR" VALUE="0xE0005000"/>
        <PARAMETER NAME="PCW_I2C1_HIGHADDR" VALUE="0xE0005FFF"/>
        <PARAMETER NAME="PCW_SPI0_BASEADDR" VALUE="0xE0006000"/>
        <PARAMETER NAME="PCW_SPI0_HIGHADDR" VALUE="0xE0006FFF"/>
        <PARAMETER NAME="PCW_SPI1_BASEADDR" VALUE="0xE0007000"/>
        <PARAMETER NAME="PCW_SPI1_HIGHADDR" VALUE="0xE0007FFF"/>
        <PARAMETER NAME="PCW_CAN0_BASEADDR" VALUE="0xE0008000"/>
        <PARAMETER NAME="PCW_CAN0_HIGHADDR" VALUE="0xE0008FFF"/>
        <PARAMETER NAME="PCW_CAN1_BASEADDR" VALUE="0xE0009000"/>
        <PARAMETER NAME="PCW_CAN1_HIGHADDR" VALUE="0xE0009FFF"/>
        <PARAMETER NAME="PCW_GPIO_BASEADDR" VALUE="0xE000A000"/>
        <PARAMETER NAME="PCW_GPIO_HIGHADDR" VALUE="0xE000AFFF"/>
        <PARAMETER NAME="PCW_ENET0_BASEADDR" VALUE="0xE000B000"/>
        <PARAMETER NAME="PCW_ENET0_HIGHADDR" VALUE="0xE000BFFF"/>
        <PARAMETER NAME="PCW_ENET1_BASEADDR" VALUE="0xE000C000"/>
        <PARAMETER NAME="PCW_ENET1_HIGHADDR" VALUE="0xE000CFFF"/>
        <PARAMETER NAME="PCW_SDIO0_BASEADDR" VALUE="0xE0100000"/>
        <PARAMETER NAME="PCW_SDIO0_HIGHADDR" VALUE="0xE0100FFF"/>
        <PARAMETER NAME="PCW_SDIO1_BASEADDR" VALUE="0xE0101000"/>
        <PARAMETER NAME="PCW_SDIO1_HIGHADDR" VALUE="0xE0101FFF"/>
        <PARAMETER NAME="PCW_USB0_BASEADDR" VALUE="0xE0102000"/>
        <PARAMETER NAME="PCW_USB0_HIGHADDR" VALUE="0xE0102fff"/>
        <PARAMETER NAME="PCW_USB1_BASEADDR" VALUE="0xE0103000"/>
        <PARAMETER NAME="PCW_USB1_HIGHADDR" VALUE="0xE0103fff"/>
        <PARAMETER NAME="PCW_TTC0_BASEADDR" VALUE="0xE0104000"/>
        <PARAMETER NAME="PCW_TTC0_HIGHADDR" VALUE="0xE0104fff"/>
        <PARAMETER NAME="PCW_TTC1_BASEADDR" VALUE="0xE0105000"/>
        <PARAMETER NAME="PCW_TTC1_HIGHADDR" VALUE="0xE0105fff"/>
        <PARAMETER NAME="PCW_FCLK_CLK0_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="PCW_FCLK_CLK1_BUF" VALUE="FALSE"/>
        <PARAMETER NAME="PCW_FCLK_CLK2_BUF" VALUE="FALSE"/>
        <PARAMETER NAME="PCW_FCLK_CLK3_BUF" VALUE="FALSE"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_FREQ_MHZ" VALUE="533.333"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BANK_ADDR_COUNT" VALUE="3"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_ROW_ADDR_COUNT" VALUE="14"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_COL_ADDR_COUNT" VALUE="10"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CL" VALUE="7"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CWL" VALUE="6"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_RCD" VALUE="7"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_RP" VALUE="7"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_RC" VALUE="48.75"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_RAS_MIN" VALUE="35.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_FAW" VALUE="30.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_AL" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0" VALUE="0.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1" VALUE="0.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2" VALUE="0.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3" VALUE="0.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY0" VALUE="0.25"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY1" VALUE="0.25"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY2" VALUE="0.25"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY3" VALUE="0.25"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_0_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_1_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_2_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_3_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_0_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_1_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_2_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_3_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH" VALUE="105.056"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH" VALUE="66.904"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH" VALUE="89.1715"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH" VALUE="113.63"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH" VALUE="98.503"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH" VALUE="68.5855"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH" VALUE="90.295"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH" VALUE="103.977"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH" VALUE="80.4535"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH" VALUE="80.4535"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH" VALUE="80.4535"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH" VALUE="80.4535"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0" VALUE="-0.025"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1" VALUE="0.014"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2" VALUE="-0.009"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3" VALUE="-0.033"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_BOARD_DELAY0" VALUE="0.089"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_BOARD_DELAY1" VALUE="0.075"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_BOARD_DELAY2" VALUE="0.085"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_BOARD_DELAY3" VALUE="0.092"/>
        <PARAMETER NAME="PCW_CPU_CPU_6X4X_MAX_RANGE" VALUE="667"/>
        <PARAMETER NAME="PCW_CRYSTAL_PERIPHERAL_FREQMHZ" VALUE="33.333333"/>
        <PARAMETER NAME="PCW_APU_PERIPHERAL_FREQMHZ" VALUE="666.666666"/>
        <PARAMETER NAME="PCW_DCI_PERIPHERAL_FREQMHZ" VALUE="10.159"/>
        <PARAMETER NAME="PCW_QSPI_PERIPHERAL_FREQMHZ" VALUE="200"/>
        <PARAMETER NAME="PCW_SMC_PERIPHERAL_FREQMHZ" VALUE="100"/>
        <PARAMETER NAME="PCW_USB0_PERIPHERAL_FREQMHZ" VALUE="60"/>
        <PARAMETER NAME="PCW_USB1_PERIPHERAL_FREQMHZ" VALUE="60"/>
        <PARAMETER NAME="PCW_SDIO_PERIPHERAL_FREQMHZ" VALUE="100"/>
        <PARAMETER NAME="PCW_UART_PERIPHERAL_FREQMHZ" VALUE="100"/>
        <PARAMETER NAME="PCW_SPI_PERIPHERAL_FREQMHZ" VALUE="166.666666"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_FREQMHZ" VALUE="100"/>
        <PARAMETER NAME="PCW_CAN0_PERIPHERAL_FREQMHZ" VALUE="-1"/>
        <PARAMETER NAME="PCW_CAN1_PERIPHERAL_FREQMHZ" VALUE="-1"/>
        <PARAMETER NAME="PCW_I2C_PERIPHERAL_FREQMHZ" VALUE="25"/>
        <PARAMETER NAME="PCW_WDT_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_PCAP_PERIPHERAL_FREQMHZ" VALUE="200"/>
        <PARAMETER NAME="PCW_TPIU_PERIPHERAL_FREQMHZ" VALUE="200"/>
        <PARAMETER NAME="PCW_FPGA0_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_FPGA1_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_FPGA2_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_FPGA3_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_ACT_APU_PERIPHERAL_FREQMHZ" VALUE="666.666687"/>
        <PARAMETER NAME="PCW_UIPARAM_ACT_DDR_FREQ_MHZ" VALUE="533.333374"/>
        <PARAMETER NAME="PCW_ACT_DCI_PERIPHERAL_FREQMHZ" VALUE="10.158730"/>
        <PARAMETER NAME="PCW_ACT_QSPI_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_SMC_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_ENET0_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_ENET1_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_USB0_PERIPHERAL_FREQMHZ" VALUE="60"/>
        <PARAMETER NAME="PCW_ACT_USB1_PERIPHERAL_FREQMHZ" VALUE="60"/>
        <PARAMETER NAME="PCW_ACT_SDIO_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_UART_PERIPHERAL_FREQMHZ" VALUE="100.000000"/>
        <PARAMETER NAME="PCW_ACT_SPI_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_CAN_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_CAN0_PERIPHERAL_FREQMHZ" VALUE="23.8095"/>
        <PARAMETER NAME="PCW_ACT_CAN1_PERIPHERAL_FREQMHZ" VALUE="23.8095"/>
        <PARAMETER NAME="PCW_ACT_I2C_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_ACT_WDT_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_ACT_PCAP_PERIPHERAL_FREQMHZ" VALUE="200.000000"/>
        <PARAMETER NAME="PCW_ACT_TPIU_PERIPHERAL_FREQMHZ" VALUE="200.000000"/>
        <PARAMETER NAME="PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ" VALUE="50.000000"/>
        <PARAMETER NAME="PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_CLK0_FREQ" VALUE="50000000"/>
        <PARAMETER NAME="PCW_CLK1_FREQ" VALUE="10000000"/>
        <PARAMETER NAME="PCW_CLK2_FREQ" VALUE="10000000"/>
        <PARAMETER NAME="PCW_CLK3_FREQ" VALUE="10000000"/>
        <PARAMETER NAME="PCW_OVERRIDE_BASIC_CLOCK" VALUE="0"/>
        <PARAMETER NAME="PCW_CPU_PERIPHERAL_DIVISOR0" VALUE="2"/>
        <PARAMETER NAME="PCW_DDR_PERIPHERAL_DIVISOR0" VALUE="2"/>
        <PARAMETER NAME="PCW_SMC_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_QSPI_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_SDIO_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_UART_PERIPHERAL_DIVISOR0" VALUE="16"/>
        <PARAMETER NAME="PCW_SPI_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_FCLK0_PERIPHERAL_DIVISOR0" VALUE="8"/>
        <PARAMETER NAME="PCW_FCLK1_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_FCLK2_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_FCLK3_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_FCLK0_PERIPHERAL_DIVISOR1" VALUE="4"/>
        <PARAMETER NAME="PCW_FCLK1_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_FCLK2_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_FCLK3_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_TPIU_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_DCI_PERIPHERAL_DIVISOR0" VALUE="15"/>
        <PARAMETER NAME="PCW_DCI_PERIPHERAL_DIVISOR1" VALUE="7"/>
        <PARAMETER NAME="PCW_PCAP_PERIPHERAL_DIVISOR0" VALUE="8"/>
        <PARAMETER NAME="PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_WDT_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_ARMPLL_CTRL_FBDIV" VALUE="40"/>
        <PARAMETER NAME="PCW_IOPLL_CTRL_FBDIV" VALUE="48"/>
        <PARAMETER NAME="PCW_DDRPLL_CTRL_FBDIV" VALUE="32"/>
        <PARAMETER NAME="PCW_CPU_CPU_PLL_FREQMHZ" VALUE="1333.333"/>
        <PARAMETER NAME="PCW_IO_IO_PLL_FREQMHZ" VALUE="1600.000"/>
        <PARAMETER NAME="PCW_DDR_DDR_PLL_FREQMHZ" VALUE="1066.667"/>
        <PARAMETER NAME="PCW_SMC_PERIPHERAL_VALID" VALUE="0"/>
        <PARAMETER NAME="PCW_SDIO_PERIPHERAL_VALID" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI_PERIPHERAL_VALID" VALUE="0"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_VALID" VALUE="0"/>
        <PARAMETER NAME="PCW_UART_PERIPHERAL_VALID" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_EMIO_CAN0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_CAN1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_ENET0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_ENET1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_PTP_ENET0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_PTP_ENET1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_GPIO" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_I2C0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_I2C1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_PJTAG" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SDIO0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_CD_SDIO0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_WP_SDIO0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SDIO1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_CD_SDIO1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_WP_SDIO1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SPI0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SPI1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_UART0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_UART1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_MODEM_UART0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_MODEM_UART1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_TTC0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_TTC1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_WDT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_TRACE" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_AXI_NONSECURE" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_M_AXI_GP0" VALUE="1"/>
        <PARAMETER NAME="PCW_USE_M_AXI_GP1" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_GP0" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_GP1" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_ACP" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_HP0" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_HP1" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_HP2" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_HP3" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_GP0_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_GP1_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_ACP_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_HP0_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_HP1_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_HP2_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_HP3_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_USE_DMA0" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DMA1" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DMA2" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DMA3" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_TRACE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_PIPELINE_WIDTH" VALUE="8"/>
        <PARAMETER NAME="PCW_INCLUDE_TRACE_BUFFER" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_BUFFER_FIFO_SIZE" VALUE="128"/>
        <PARAMETER NAME="PCW_USE_TRACE_DATA_EDGE_DETECTOR" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_BUFFER_CLOCK_DELAY" VALUE="12"/>
        <PARAMETER NAME="PCW_USE_CROSS_TRIGGER" VALUE="0"/>
        <PARAMETER NAME="PCW_FTM_CTI_IN0" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_IN1" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_IN2" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_IN3" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_OUT0" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_OUT1" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_OUT2" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_OUT3" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_USE_DEBUG" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_CR_FABRIC" VALUE="1"/>
        <PARAMETER NAME="PCW_USE_AXI_FABRIC_IDLE" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DDR_BYPASS" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_FABRIC_INTERRUPT" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_PROC_EVENT_BUS" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_EXPANDED_IOP" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_HIGH_OCM" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_PS_SLCR_REGISTERS" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_EXPANDED_PS_SLCR_REGISTERS" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_CORESIGHT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SRAM_INT" VALUE="0"/>
        <PARAMETER NAME="PCW_GPIO_EMIO_GPIO_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_GP0_NUM_WRITE_THREADS" VALUE="4"/>
        <PARAMETER NAME="PCW_GP0_NUM_READ_THREADS" VALUE="4"/>
        <PARAMETER NAME="PCW_GP1_NUM_WRITE_THREADS" VALUE="4"/>
        <PARAMETER NAME="PCW_GP1_NUM_READ_THREADS" VALUE="4"/>
        <PARAMETER NAME="PCW_UART0_BAUD_RATE" VALUE="115200"/>
        <PARAMETER NAME="PCW_UART1_BAUD_RATE" VALUE="115200"/>
        <PARAMETER NAME="PCW_EN_4K_TIMER" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_ENABLE_STATIC_REMAP" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_SUPPORT_NARROW_BURST" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_THREAD_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_ENABLE_STATIC_REMAP" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_SUPPORT_NARROW_BURST" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_THREAD_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="PCW_S_AXI_GP0_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_GP1_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_ACP_ID_WIDTH" VALUE="3"/>
        <PARAMETER NAME="PCW_INCLUDE_ACP_TRANS_CHECK" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DEFAULT_ACP_USER_VAL" VALUE="0"/>
        <PARAMETER NAME="PCW_S_AXI_ACP_ARUSER_VAL" VALUE="31"/>
        <PARAMETER NAME="PCW_S_AXI_ACP_AWUSER_VAL" VALUE="31"/>
        <PARAMETER NAME="PCW_S_AXI_HP0_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_HP0_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_S_AXI_HP1_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_HP1_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_S_AXI_HP2_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_HP2_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_S_AXI_HP3_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_HP3_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_NUM_F2P_INTR_INPUTS" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_DDR" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_SMC" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_QSPI" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CAN0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CAN1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_ENET0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_ENET1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_GPIO" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_I2C0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_I2C1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_PJTAG" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_SDIO0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_SDIO1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_SPI0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_SPI1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_UART0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_UART1" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_MODEM_UART0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_MODEM_UART1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_TTC0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_TTC1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_WDT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_TRACE" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_USB0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_USB1" VALUE="0"/>
        <PARAMETER NAME="PCW_DQ_WIDTH" VALUE="32"/>
        <PARAMETER NAME="PCW_DQS_WIDTH" VALUE="4"/>
        <PARAMETER NAME="PCW_DM_WIDTH" VALUE="4"/>
        <PARAMETER NAME="PCW_MIO_PRIMITIVE" VALUE="54"/>
        <PARAMETER NAME="PCW_EN_CLK0_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_CLK1_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLK2_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLK3_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_RST0_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_RST1_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_RST2_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_RST3_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLKTRIG0_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLKTRIG1_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLKTRIG2_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLKTRIG3_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC_ABORT_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC2_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC3_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC4_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC5_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC6_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC7_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SMC_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_QSPI_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_CTI_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_GPIO_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_USB0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_ENET0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SDIO0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_I2C0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SPI0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_UART0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_CAN0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_USB1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_ENET1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SDIO1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_I2C1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SPI1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_UART1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_CAN1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_IRQ_F2P_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_IRQ_F2P_MODE" VALUE="DIRECT"/>
        <PARAMETER NAME="PCW_CORE0_FIQ_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_CORE0_IRQ_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_CORE1_FIQ_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_CORE1_IRQ_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_VALUE_SILVERSION" VALUE="3"/>
        <PARAMETER NAME="PCW_GP0_EN_MODIFIABLE_TXN" VALUE="1"/>
        <PARAMETER NAME="PCW_GP1_EN_MODIFIABLE_TXN" VALUE="1"/>
        <PARAMETER NAME="PCW_IMPORT_BOARD_PRESET" VALUE="None"/>
        <PARAMETER NAME="PCW_PERIPHERAL_BOARD_PRESET" VALUE="part0"/>
        <PARAMETER NAME="PCW_PRESET_BANK0_VOLTAGE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_PRESET_BANK1_VOLTAGE" VALUE="LVCMOS 1.8V"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_ADV_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_MEMORY_TYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_ECC" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BUS_WIDTH" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BL" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_HIGH_TEMP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_PARTNO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DRAM_WIDTH" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DEVICE_CAPACITY" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_SPEED_BIN" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_TRAIN_READ_GATE" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_TRAIN_DATA_EYE" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_STOP_EN" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_USE_INTERNAL_VREF" VALUE="0"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_0" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_1" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_2" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_3" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_0" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_1" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_2" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_3" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PORT0_HPR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_DDR_PORT1_HPR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_DDR_PORT2_HPR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_DDR_PORT3_HPR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_DDR_HPRLPR_QUEUE_PARTITION" VALUE="HPR(0)/LPR(32)"/>
        <PARAMETER NAME="PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL" VALUE="2"/>
        <PARAMETER NAME="PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL" VALUE="15"/>
        <PARAMETER NAME="PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL" VALUE="2"/>
        <PARAMETER NAME="PCW_NAND_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NAND_NAND_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NAND_GRP_D8_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NAND_GRP_D8_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_NOR_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_A25_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_A25_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_CS0_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_CS0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS0_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_CS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_CS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_INT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_INT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_QSPI_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_QSPI_QSPI_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_QSPI_GRP_SINGLE_SS_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_QSPI_GRP_SINGLE_SS_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_QSPI_GRP_SS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_QSPI_GRP_SS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SINGLE_QSPI_DATA_MODE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DUAL_STACK_QSPI_DATA_MODE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DUAL_PARALLEL_QSPI_DATA_MODE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_QSPI_GRP_IO1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_QSPI_GRP_IO1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_QSPI_GRP_FBCLK_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_QSPI_GRP_FBCLK_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_QSPI_INTERNAL_HIGHADDRESS" VALUE="0xFCFFFFFF"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET0_ENET0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET0_GRP_MDIO_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET0_GRP_MDIO_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET_RESET_SELECT" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET0_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET0_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET1_ENET1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET1_GRP_MDIO_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET1_GRP_MDIO_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET1_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET1_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD0_SD0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD0_GRP_CD_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD0_GRP_CD_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD0_GRP_WP_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD0_GRP_WP_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD0_GRP_POW_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD0_GRP_POW_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD1_SD1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD1_GRP_CD_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD1_GRP_CD_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD1_GRP_WP_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD1_GRP_WP_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD1_GRP_POW_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD1_GRP_POW_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UART0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_UART0_UART0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UART0_GRP_FULL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_UART0_GRP_FULL_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UART1_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_UART1_UART1_IO" VALUE="MIO 48 .. 49"/>
        <PARAMETER NAME="PCW_UART1_GRP_FULL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_UART1_GRP_FULL_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI0_SPI0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS0_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS2_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS2_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI1_SPI1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS0_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS2_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS2_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_CAN0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_CAN0_CAN0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_CAN0_GRP_CLK_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_CAN0_GRP_CLK_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_CAN1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_CAN1_CAN1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_CAN1_GRP_CLK_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_CAN1_GRP_CLK_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_TRACE_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_GRP_2BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_2BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_GRP_4BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_4BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_GRP_8BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_8BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_GRP_16BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_16BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_GRP_32BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_32BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_INTERNAL_WIDTH" VALUE="2"/>
        <PARAMETER NAME="PCW_WDT_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_WDT_WDT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TTC0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TTC0_TTC0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TTC1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TTC1_TTC1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_PJTAG_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_PJTAG_PJTAG_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_USB0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_USB0_USB0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_USB_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_USB_RESET_SELECT" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_USB0_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_USB0_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_USB1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_USB1_USB1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_USB1_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_USB1_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C0_I2C0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C0_GRP_INT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C0_GRP_INT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C0_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C0_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C1_I2C1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C1_GRP_INT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C1_GRP_INT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C_RESET_SELECT" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C1_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C1_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_GPIO_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_GPIO_MIO_GPIO_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_GPIO_MIO_GPIO_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_GPIO_EMIO_GPIO_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_GPIO_EMIO_GPIO_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_APU_CLK_RATIO_ENABLE" VALUE="6:2:1"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_FREQMHZ" VALUE="1000 Mbps"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_FREQMHZ" VALUE="1000 Mbps"/>
        <PARAMETER NAME="PCW_CPU_PERIPHERAL_CLKSRC" VALUE="ARM PLL"/>
        <PARAMETER NAME="PCW_DDR_PERIPHERAL_CLKSRC" VALUE="DDR PLL"/>
        <PARAMETER NAME="PCW_SMC_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_QSPI_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_SDIO_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_UART_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_SPI_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_FCLK0_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_FCLK1_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_FCLK2_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_FCLK3_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_CAN0_PERIPHERAL_CLKSRC" VALUE="External"/>
        <PARAMETER NAME="PCW_CAN1_PERIPHERAL_CLKSRC" VALUE="External"/>
        <PARAMETER NAME="PCW_TPIU_PERIPHERAL_CLKSRC" VALUE="External"/>
        <PARAMETER NAME="PCW_TTC0_CLK0_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC0_CLK1_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC0_CLK2_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC1_CLK0_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC1_CLK1_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC1_CLK2_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_WDT_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_DCI_PERIPHERAL_CLKSRC" VALUE="DDR PLL"/>
        <PARAMETER NAME="PCW_PCAP_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_USB_RESET_POLARITY" VALUE="Active Low"/>
        <PARAMETER NAME="PCW_ENET_RESET_POLARITY" VALUE="Active Low"/>
        <PARAMETER NAME="PCW_I2C_RESET_POLARITY" VALUE="Active Low"/>
        <PARAMETER NAME="PCW_MIO_0_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_0_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_0_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_0_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_1_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_1_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_1_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_1_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_2_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_2_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_2_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_2_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_3_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_3_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_3_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_3_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_4_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_4_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_4_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_4_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_5_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_5_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_5_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_5_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_6_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_6_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_6_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_6_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_7_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_7_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_7_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_7_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_8_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_8_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_8_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_8_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_9_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_9_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_9_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_9_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_10_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_10_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_10_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_10_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_11_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_11_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_11_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_11_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_12_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_12_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_12_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_12_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_13_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_13_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_13_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_13_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_14_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_14_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_14_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_14_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_15_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_15_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_15_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_15_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_16_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_16_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_16_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_16_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_17_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_17_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_17_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_17_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_18_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_18_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_18_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_18_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_19_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_19_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_19_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_19_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_20_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_20_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_20_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_20_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_21_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_21_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_21_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_21_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_22_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_22_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_22_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_22_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_23_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_23_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_23_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_23_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_24_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_24_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_24_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_24_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_25_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_25_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_25_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_25_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_26_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_26_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_26_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_26_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_27_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_27_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_27_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_27_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_28_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_28_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_28_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_28_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_29_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_29_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_29_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_29_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_30_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_30_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_30_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_30_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_31_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_31_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_31_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_31_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_32_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_32_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_32_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_32_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_33_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_33_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_33_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_33_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_34_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_34_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_34_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_34_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_35_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_35_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_35_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_35_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_36_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_36_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_36_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_36_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_37_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_37_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_37_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_37_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_38_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_38_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_38_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_38_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_39_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_39_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_39_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_39_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_40_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_40_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_40_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_40_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_41_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_41_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_41_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_41_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_42_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_42_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_42_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_42_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_43_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_43_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_43_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_43_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_44_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_44_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_44_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_44_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_45_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_45_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_45_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_45_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_46_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_46_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_46_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_46_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_47_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_47_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_47_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_47_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_48_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_48_IOTYPE" VALUE="LVCMOS 1.8V"/>
        <PARAMETER NAME="PCW_MIO_48_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_48_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_49_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_49_IOTYPE" VALUE="LVCMOS 1.8V"/>
        <PARAMETER NAME="PCW_MIO_49_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_49_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_50_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_50_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_50_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_50_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_51_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_51_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_51_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_51_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_52_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_52_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_52_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_52_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_53_PULLUP" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_53_IOTYPE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_53_DIRECTION" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_MIO_53_SLEW" VALUE="&lt;Select>"/>
        <PARAMETER NAME="preset" VALUE="None"/>
        <PARAMETER NAME="PCW_UIPARAM_GENERATE_SUMMARY" VALUE="NA"/>
        <PARAMETER NAME="PCW_MIO_TREE_PERIPHERALS" VALUE="unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#UART 1#UART 1#unassigned#unassigned#unassigned#unassigned"/>
        <PARAMETER NAME="PCW_MIO_TREE_SIGNALS" VALUE="unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#tx#rx#unassigned#unassigned#unassigned#unassigned"/>
        <PARAMETER NAME="PCW_PS7_SI_REV" VALUE="PRODUCTION"/>
        <PARAMETER NAME="PCW_FPGA_FCLK0_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_FPGA_FCLK1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_FPGA_FCLK2_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_FPGA_FCLK3_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_TR" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_PC" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_CEOE" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_WE_TIME" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_TR" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_PC" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_CEOE" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_WE_TIME" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_TR" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_PC" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_CEOE" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_CS0_WE_TIME" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_TR" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_PC" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_CEOE" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_CS1_WE_TIME" VALUE="0"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_RR" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_AR" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_CLR" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_REA" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T0" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T1" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T2" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T3" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T4" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T5" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T6" VALUE="NA"/>
        <PARAMETER NAME="PCW_PACKAGE_NAME" VALUE="clg400"/>
        <PARAMETER NAME="PCW_PLL_BYPASSMODE_ENABLE" VALUE="0"/>
        <PARAMETER NAME="Component_Name" VALUE="design_1_processing_system7_0_0"/>
        <PARAMETER NAME="EDK_IPTYPE" VALUE="PERIPHERAL"/>
      </PARAMETERS>
      <PORTS>
        <PORT DIR="O" NAME="M_AXI_GP0_ARVALID" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_AWVALID" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_BREADY" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_BREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_bready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_RREADY" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_rready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_WLAST" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_wlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_WVALID" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_wvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="M_AXI_GP0_ARID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="M_AXI_GP0_AWID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="M_AXI_GP0_WID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_wid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_ARBURST" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_ARLOCK" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_ARSIZE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_AWBURST" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_AWLOCK" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_AWSIZE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_ARPROT" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_AWPROT" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M_AXI_GP0_ARADDR" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_araddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M_AXI_GP0_AWADDR" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awaddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M_AXI_GP0_WDATA" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_wdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_ARCACHE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_ARLEN" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_ARQOS" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_AWCACHE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_AWLEN" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_AWQOS" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_WSTRB" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WSTRB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_wstrb"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="50000000" DIR="I" NAME="M_AXI_GP0_ACLK" SIGIS="clk" SIGNAME="processing_system7_0_FCLK_CLK0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="FCLK_CLK0"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_ARREADY" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_arready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_AWREADY" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_awready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_BVALID" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_BVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_bvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_RLAST" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_rlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_RVALID" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_rvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_WREADY" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_wready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="M_AXI_GP0_BID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_BID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_bid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="M_AXI_GP0_RID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_rid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="M_AXI_GP0_BRESP" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_BRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_bresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="M_AXI_GP0_RRESP" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_rresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="M_AXI_GP0_RDATA" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_AXI_rdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="50000000" DIR="O" NAME="FCLK_CLK0" SIGIS="clk" SIGNAME="processing_system7_0_FCLK_CLK0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ACLK"/>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_ACLK"/>
            <CONNECTION INSTANCE="rst_ps7_0_50M" PORT="slowest_sync_clk"/>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="ap_clk"/>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_ACLK"/>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="ACLK"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="FCLK_RESET0_N" SIGIS="rst" SIGNAME="processing_system7_0_FCLK_RESET0_N">
          <CONNECTIONS>
            <CONNECTION INSTANCE="rst_ps7_0_50M" PORT="ext_reset_in"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" LEFT="53" NAME="MIO" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="IO" NAME="PS_SRSTB" SIGIS="undef"/>
        <PORT DIR="IO" NAME="PS_CLK" SIGIS="undef"/>
        <PORT DIR="IO" NAME="PS_PORB" SIGIS="undef"/>
      </PORTS>
      <BUSINTERFACES>
        <BUSINTERFACE BUSNAME="__NOC__" NAME="FIXED_IO" TYPE="INITIATOR" VLNV="xilinx.com:display_processing_system7:fixedio:1.0">
          <PARAMETER NAME="CAN_DEBUG" VALUE="false"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="MIO" PHYSICAL="MIO"/>
            <PORTMAP LOGICAL="PS_SRSTB" PHYSICAL="PS_SRSTB"/>
            <PORTMAP LOGICAL="PS_CLK" PHYSICAL="PS_CLK"/>
            <PORTMAP LOGICAL="PS_PORB" PHYSICAL="PS_PORB"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="processing_system7_0_M_AXI_GP0" DATAWIDTH="32" NAME="M_AXI_GP0" TYPE="MASTER" VLNV="xilinx.com:interface:aximm:1.0">
          <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="0"/>
          <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
          <PARAMETER NAME="PROTOCOL" VALUE="AXI3"/>
          <PARAMETER NAME="FREQ_HZ" VALUE="50000000"/>
          <PARAMETER NAME="ID_WIDTH" VALUE="12"/>
          <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
          <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
          <PARAMETER NAME="HAS_BURST" VALUE="1"/>
          <PARAMETER NAME="HAS_LOCK" VALUE="1"/>
          <PARAMETER NAME="HAS_PROT" VALUE="1"/>
          <PARAMETER NAME="HAS_CACHE" VALUE="1"/>
          <PARAMETER NAME="HAS_QOS" VALUE="1"/>
          <PARAMETER NAME="HAS_REGION" VALUE="0"/>
          <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
          <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
          <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="16"/>
          <PARAMETER NAME="PHASE" VALUE="0.000"/>
          <PARAMETER NAME="CLK_DOMAIN" VALUE="design_1_processing_system7_0_0_FCLK_CLK0"/>
          <PARAMETER NAME="NUM_READ_THREADS" VALUE="4"/>
          <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="4"/>
          <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="M_AXI_GP0_ARVALID"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="M_AXI_GP0_AWVALID"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="M_AXI_GP0_BREADY"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="M_AXI_GP0_RREADY"/>
            <PORTMAP LOGICAL="WLAST" PHYSICAL="M_AXI_GP0_WLAST"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="M_AXI_GP0_WVALID"/>
            <PORTMAP LOGICAL="ARID" PHYSICAL="M_AXI_GP0_ARID"/>
            <PORTMAP LOGICAL="AWID" PHYSICAL="M_AXI_GP0_AWID"/>
            <PORTMAP LOGICAL="WID" PHYSICAL="M_AXI_GP0_WID"/>
            <PORTMAP LOGICAL="ARBURST" PHYSICAL="M_AXI_GP0_ARBURST"/>
            <PORTMAP LOGICAL="ARLOCK" PHYSICAL="M_AXI_GP0_ARLOCK"/>
            <PORTMAP LOGICAL="ARSIZE" PHYSICAL="M_AXI_GP0_ARSIZE"/>
            <PORTMAP LOGICAL="AWBURST" PHYSICAL="M_AXI_GP0_AWBURST"/>
            <PORTMAP LOGICAL="AWLOCK" PHYSICAL="M_AXI_GP0_AWLOCK"/>
            <PORTMAP LOGICAL="AWSIZE" PHYSICAL="M_AXI_GP0_AWSIZE"/>
            <PORTMAP LOGICAL="ARPROT" PHYSICAL="M_AXI_GP0_ARPROT"/>
            <PORTMAP LOGICAL="AWPROT" PHYSICAL="M_AXI_GP0_AWPROT"/>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="M_AXI_GP0_ARADDR"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="M_AXI_GP0_AWADDR"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="M_AXI_GP0_WDATA"/>
            <PORTMAP LOGICAL="ARCACHE" PHYSICAL="M_AXI_GP0_ARCACHE"/>
            <PORTMAP LOGICAL="ARLEN" PHYSICAL="M_AXI_GP0_ARLEN"/>
            <PORTMAP LOGICAL="ARQOS" PHYSICAL="M_AXI_GP0_ARQOS"/>
            <PORTMAP LOGICAL="AWCACHE" PHYSICAL="M_AXI_GP0_AWCACHE"/>
            <PORTMAP LOGICAL="AWLEN" PHYSICAL="M_AXI_GP0_AWLEN"/>
            <PORTMAP LOGICAL="AWQOS" PHYSICAL="M_AXI_GP0_AWQOS"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="M_AXI_GP0_WSTRB"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="M_AXI_GP0_ARREADY"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="M_AXI_GP0_AWREADY"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="M_AXI_GP0_BVALID"/>
            <PORTMAP LOGICAL="RLAST" PHYSICAL="M_AXI_GP0_RLAST"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="M_AXI_GP0_RVALID"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="M_AXI_GP0_WREADY"/>
            <PORTMAP LOGICAL="BID" PHYSICAL="M_AXI_GP0_BID"/>
            <PORTMAP LOGICAL="RID" PHYSICAL="M_AXI_GP0_RID"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="M_AXI_GP0_BRESP"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="M_AXI_GP0_RRESP"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="M_AXI_GP0_RDATA"/>
          </PORTMAPS>
        </BUSINTERFACE>
      </BUSINTERFACES>
      <MEMORYMAP>
        <MEMRANGE ADDRESSBLOCK="Reg" BASENAME="C_S_AXI_AXILITES_BASEADDR" BASEVALUE="0x43C00000" HIGHNAME="C_S_AXI_AXILITES_HIGHADDR" HIGHVALUE="0x43C0FFFF" INSTANCE="eig_qr_balanced_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" MASTERBUSINTERFACE="M_AXI_GP0" MEMTYPE="REGISTER" SLAVEBUSINTERFACE="s_axi_AXILiteS"/>
      </MEMORYMAP>
      <PERIPHERALS>
        <PERIPHERAL INSTANCE="eig_qr_balanced_0"/>
      </PERIPHERALS>
    </MODULE>
    <MODULE FULLNAME="/ps7_0_axi_periph" HWVERSION="2.1" INSTANCE="ps7_0_axi_periph" IPTYPE="BUS" IS_ENABLE="1" MODCLASS="BUS" MODTYPE="axi_interconnect" VLNV="xilinx.com:ip:axi_interconnect:2.1">
      <DOCUMENTS>
        <DOCUMENT SOURCE="http://www.xilinx.com/cgi-bin/docs/ipdoc?c=axi_interconnect;v=v2_1;d=pg059-axi-interconnect.pdf"/>
      </DOCUMENTS>
      <PARAMETERS>
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        <PARAMETER NAME="ENABLE_PROTOCOL_CHECKERS" VALUE="0"/>
        <PARAMETER NAME="XBAR_DATA_WIDTH" VALUE="32"/>
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        <PARAMETER NAME="PCHK_MAX_RD_BURSTS" VALUE="2"/>
        <PARAMETER NAME="PCHK_MAX_WR_BURSTS" VALUE="2"/>
        <PARAMETER NAME="SYNCHRONIZATION_STAGES" VALUE="3"/>
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        <PARAMETER NAME="M36_SECURE" VALUE="0"/>
        <PARAMETER NAME="M37_SECURE" VALUE="0"/>
        <PARAMETER NAME="M38_SECURE" VALUE="0"/>
        <PARAMETER NAME="M39_SECURE" VALUE="0"/>
        <PARAMETER NAME="M40_SECURE" VALUE="0"/>
        <PARAMETER NAME="M41_SECURE" VALUE="0"/>
        <PARAMETER NAME="M42_SECURE" VALUE="0"/>
        <PARAMETER NAME="M43_SECURE" VALUE="0"/>
        <PARAMETER NAME="M44_SECURE" VALUE="0"/>
        <PARAMETER NAME="M45_SECURE" VALUE="0"/>
        <PARAMETER NAME="M46_SECURE" VALUE="0"/>
        <PARAMETER NAME="M47_SECURE" VALUE="0"/>
        <PARAMETER NAME="M48_SECURE" VALUE="0"/>
        <PARAMETER NAME="M49_SECURE" VALUE="0"/>
        <PARAMETER NAME="M50_SECURE" VALUE="0"/>
        <PARAMETER NAME="M51_SECURE" VALUE="0"/>
        <PARAMETER NAME="M52_SECURE" VALUE="0"/>
        <PARAMETER NAME="M53_SECURE" VALUE="0"/>
        <PARAMETER NAME="M54_SECURE" VALUE="0"/>
        <PARAMETER NAME="M55_SECURE" VALUE="0"/>
        <PARAMETER NAME="M56_SECURE" VALUE="0"/>
        <PARAMETER NAME="M57_SECURE" VALUE="0"/>
        <PARAMETER NAME="M58_SECURE" VALUE="0"/>
        <PARAMETER NAME="M59_SECURE" VALUE="0"/>
        <PARAMETER NAME="M60_SECURE" VALUE="0"/>
        <PARAMETER NAME="M61_SECURE" VALUE="0"/>
        <PARAMETER NAME="M62_SECURE" VALUE="0"/>
        <PARAMETER NAME="M63_SECURE" VALUE="0"/>
        <PARAMETER NAME="S00_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S01_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S02_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S03_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S04_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S05_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S06_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S07_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S08_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S09_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S10_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S11_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S12_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S13_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S14_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="S15_ARB_PRIORITY" VALUE="0"/>
        <PARAMETER NAME="Component_Name" VALUE="design_1_ps7_0_axi_periph_0"/>
        <PARAMETER NAME="EDK_IPTYPE" VALUE="BUS"/>
      </PARAMETERS>
      <PORTS>
        <PORT DIR="I" NAME="ACLK" SIGIS="clk" SIGNAME="processing_system7_0_FCLK_CLK0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="FCLK_CLK0"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="ARESETN" SIGIS="rst" SIGNAME="rst_ps7_0_50M_interconnect_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="rst_ps7_0_50M" PORT="interconnect_aresetn"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S00_ACLK" SIGIS="clk" SIGNAME="processing_system7_0_FCLK_CLK0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="FCLK_CLK0"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S00_ARESETN" SIGIS="rst" SIGNAME="rst_ps7_0_50M_peripheral_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="rst_ps7_0_50M" PORT="peripheral_aresetn"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M00_ACLK" SIGIS="clk" SIGNAME="processing_system7_0_FCLK_CLK0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="FCLK_CLK0"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M00_ARESETN" SIGIS="rst" SIGNAME="rst_ps7_0_50M_peripheral_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="rst_ps7_0_50M" PORT="peripheral_aresetn"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S00_AXI_arvalid" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S00_AXI_awvalid" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S00_AXI_bready" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_BREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_BREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S00_AXI_rready" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_RREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S00_AXI_wlast" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_WLAST"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S00_AXI_wvalid" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_WVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="S00_AXI_arid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="S00_AXI_awid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="S00_AXI_wid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_WID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S00_AXI_arburst" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARBURST"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S00_AXI_arlock" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARLOCK"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S00_AXI_arsize" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARSIZE"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S00_AXI_awburst" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWBURST"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S00_AXI_awlock" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWLOCK"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S00_AXI_awsize" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWSIZE"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S00_AXI_arprot" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARPROT"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S00_AXI_awprot" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWPROT"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="S00_AXI_araddr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARADDR"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="S00_AXI_awaddr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWADDR"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="S00_AXI_wdata" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_WDATA"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S00_AXI_arcache" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARCACHE"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S00_AXI_arlen" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARLEN"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S00_AXI_arqos" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARQOS"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S00_AXI_awcache" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWCACHE"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S00_AXI_awlen" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWLEN"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S00_AXI_awqos" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWQOS"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S00_AXI_wstrb" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WSTRB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_WSTRB"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S00_AXI_arready" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_ARREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_ARREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S00_AXI_awready" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_AWREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_AWREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S00_AXI_bvalid" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_BVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_BVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S00_AXI_rlast" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_RLAST"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S00_AXI_rvalid" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_RVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S00_AXI_wready" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_WREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_WREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="S00_AXI_bid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_BID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_BID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="S00_AXI_rid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_RID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="S00_AXI_bresp" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_BRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_BRESP"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="S00_AXI_rresp" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_RRESP"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="S00_AXI_rdata" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_0_M_AXI_GP0_RDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="M_AXI_GP0_RDATA"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M00_AXI_arvalid" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_ARVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_ARVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M00_AXI_awvalid" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_AWVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_AWVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M00_AXI_bready" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_BREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_BREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M00_AXI_rready" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_RREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_RREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M00_AXI_wlast" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_wvalid" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_WVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_WVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M00_AXI_arid" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_awid" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_wid" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_arburst" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_arlock" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_arsize" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_awburst" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_awlock" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_awsize" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_arprot" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_awprot" SIGIS="undef"/>
        <PORT DIR="O" LEFT="31" NAME="M00_AXI_araddr" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_ARADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_ARADDR"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M00_AXI_awaddr" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_AWADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_AWADDR"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M00_AXI_wdata" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_WDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_WDATA"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M00_AXI_arcache" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_arlen" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_arqos" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_awcache" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_awlen" SIGIS="undef"/>
        <PORT DIR="O" NAME="M00_AXI_awqos" SIGIS="undef"/>
        <PORT DIR="O" LEFT="3" NAME="M00_AXI_wstrb" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_WSTRB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_WSTRB"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M00_AXI_arready" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_ARREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_ARREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M00_AXI_awready" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_AWREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_AWREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M00_AXI_bvalid" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_BVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_BVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M00_AXI_rlast" SIGIS="undef"/>
        <PORT DIR="I" NAME="M00_AXI_rvalid" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_RVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_RVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M00_AXI_wready" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_WREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_WREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M00_AXI_bid" SIGIS="undef"/>
        <PORT DIR="I" NAME="M00_AXI_rid" SIGIS="undef"/>
        <PORT DIR="I" LEFT="1" NAME="M00_AXI_bresp" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_BRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_BRESP"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="M00_AXI_rresp" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_RRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_RRESP"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="M00_AXI_rdata" RIGHT="0" SIGIS="undef" SIGNAME="eig_qr_balanced_0_s_axi_AXILiteS_RDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="s_axi_AXILiteS_RDATA"/>
          </CONNECTIONS>
        </PORT>
      </PORTS>
      <BUSINTERFACES>
        <BUSINTERFACE BUSNAME="processing_system7_0_M_AXI_GP0" DATAWIDTH="32" NAME="S00_AXI" TYPE="SLAVE" VLNV="xilinx.com:interface:aximm:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="S00_AXI_arvalid"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="S00_AXI_awvalid"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="S00_AXI_bready"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="S00_AXI_rready"/>
            <PORTMAP LOGICAL="WLAST" PHYSICAL="S00_AXI_wlast"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="S00_AXI_wvalid"/>
            <PORTMAP LOGICAL="ARID" PHYSICAL="S00_AXI_arid"/>
            <PORTMAP LOGICAL="AWID" PHYSICAL="S00_AXI_awid"/>
            <PORTMAP LOGICAL="WID" PHYSICAL="S00_AXI_wid"/>
            <PORTMAP LOGICAL="ARBURST" PHYSICAL="S00_AXI_arburst"/>
            <PORTMAP LOGICAL="ARLOCK" PHYSICAL="S00_AXI_arlock"/>
            <PORTMAP LOGICAL="ARSIZE" PHYSICAL="S00_AXI_arsize"/>
            <PORTMAP LOGICAL="AWBURST" PHYSICAL="S00_AXI_awburst"/>
            <PORTMAP LOGICAL="AWLOCK" PHYSICAL="S00_AXI_awlock"/>
            <PORTMAP LOGICAL="AWSIZE" PHYSICAL="S00_AXI_awsize"/>
            <PORTMAP LOGICAL="ARPROT" PHYSICAL="S00_AXI_arprot"/>
            <PORTMAP LOGICAL="AWPROT" PHYSICAL="S00_AXI_awprot"/>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="S00_AXI_araddr"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="S00_AXI_awaddr"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="S00_AXI_wdata"/>
            <PORTMAP LOGICAL="ARCACHE" PHYSICAL="S00_AXI_arcache"/>
            <PORTMAP LOGICAL="ARLEN" PHYSICAL="S00_AXI_arlen"/>
            <PORTMAP LOGICAL="ARQOS" PHYSICAL="S00_AXI_arqos"/>
            <PORTMAP LOGICAL="AWCACHE" PHYSICAL="S00_AXI_awcache"/>
            <PORTMAP LOGICAL="AWLEN" PHYSICAL="S00_AXI_awlen"/>
            <PORTMAP LOGICAL="AWQOS" PHYSICAL="S00_AXI_awqos"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="S00_AXI_wstrb"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="S00_AXI_arready"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="S00_AXI_awready"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="S00_AXI_bvalid"/>
            <PORTMAP LOGICAL="RLAST" PHYSICAL="S00_AXI_rlast"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="S00_AXI_rvalid"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="S00_AXI_wready"/>
            <PORTMAP LOGICAL="BID" PHYSICAL="S00_AXI_bid"/>
            <PORTMAP LOGICAL="RID" PHYSICAL="S00_AXI_rid"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="S00_AXI_bresp"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="S00_AXI_rresp"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="S00_AXI_rdata"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="ps7_0_axi_periph_M00_AXI" DATAWIDTH="32" NAME="M00_AXI" TYPE="MASTER" VLNV="xilinx.com:interface:aximm:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="M00_AXI_arvalid"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="M00_AXI_awvalid"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="M00_AXI_bready"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="M00_AXI_rready"/>
            <PORTMAP LOGICAL="WLAST" PHYSICAL="M00_AXI_wlast"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="M00_AXI_wvalid"/>
            <PORTMAP LOGICAL="ARID" PHYSICAL="M00_AXI_arid"/>
            <PORTMAP LOGICAL="AWID" PHYSICAL="M00_AXI_awid"/>
            <PORTMAP LOGICAL="WID" PHYSICAL="M00_AXI_wid"/>
            <PORTMAP LOGICAL="ARBURST" PHYSICAL="M00_AXI_arburst"/>
            <PORTMAP LOGICAL="ARLOCK" PHYSICAL="M00_AXI_arlock"/>
            <PORTMAP LOGICAL="ARSIZE" PHYSICAL="M00_AXI_arsize"/>
            <PORTMAP LOGICAL="AWBURST" PHYSICAL="M00_AXI_awburst"/>
            <PORTMAP LOGICAL="AWLOCK" PHYSICAL="M00_AXI_awlock"/>
            <PORTMAP LOGICAL="AWSIZE" PHYSICAL="M00_AXI_awsize"/>
            <PORTMAP LOGICAL="ARPROT" PHYSICAL="M00_AXI_arprot"/>
            <PORTMAP LOGICAL="AWPROT" PHYSICAL="M00_AXI_awprot"/>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="M00_AXI_araddr"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="M00_AXI_awaddr"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="M00_AXI_wdata"/>
            <PORTMAP LOGICAL="ARCACHE" PHYSICAL="M00_AXI_arcache"/>
            <PORTMAP LOGICAL="ARLEN" PHYSICAL="M00_AXI_arlen"/>
            <PORTMAP LOGICAL="ARQOS" PHYSICAL="M00_AXI_arqos"/>
            <PORTMAP LOGICAL="AWCACHE" PHYSICAL="M00_AXI_awcache"/>
            <PORTMAP LOGICAL="AWLEN" PHYSICAL="M00_AXI_awlen"/>
            <PORTMAP LOGICAL="AWQOS" PHYSICAL="M00_AXI_awqos"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="M00_AXI_wstrb"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="M00_AXI_arready"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="M00_AXI_awready"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="M00_AXI_bvalid"/>
            <PORTMAP LOGICAL="RLAST" PHYSICAL="M00_AXI_rlast"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="M00_AXI_rvalid"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="M00_AXI_wready"/>
            <PORTMAP LOGICAL="BID" PHYSICAL="M00_AXI_bid"/>
            <PORTMAP LOGICAL="RID" PHYSICAL="M00_AXI_rid"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="M00_AXI_bresp"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="M00_AXI_rresp"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="M00_AXI_rdata"/>
          </PORTMAPS>
        </BUSINTERFACE>
      </BUSINTERFACES>
    </MODULE>
    <MODULE FULLNAME="/rst_ps7_0_50M" HWVERSION="5.0" INSTANCE="rst_ps7_0_50M" IPTYPE="PERIPHERAL" IS_ENABLE="1" MODCLASS="PERIPHERAL" MODTYPE="proc_sys_reset" VLNV="xilinx.com:ip:proc_sys_reset:5.0">
      <DOCUMENTS>
        <DOCUMENT SOURCE="http://www.xilinx.com/cgi-bin/docs/ipdoc?c=proc_sys_reset;v=v5_0;d=pg164-proc-sys-reset.pdf"/>
      </DOCUMENTS>
      <PARAMETERS>
        <PARAMETER NAME="C_FAMILY" VALUE="zynq"/>
        <PARAMETER NAME="C_EXT_RST_WIDTH" VALUE="4"/>
        <PARAMETER NAME="C_AUX_RST_WIDTH" VALUE="4"/>
        <PARAMETER NAME="C_EXT_RESET_HIGH" VALUE="0"/>
        <PARAMETER NAME="C_AUX_RESET_HIGH" VALUE="0"/>
        <PARAMETER NAME="C_NUM_BUS_RST" VALUE="1"/>
        <PARAMETER NAME="C_NUM_PERP_RST" VALUE="1"/>
        <PARAMETER NAME="C_NUM_INTERCONNECT_ARESETN" VALUE="1"/>
        <PARAMETER NAME="C_NUM_PERP_ARESETN" VALUE="1"/>
        <PARAMETER NAME="Component_Name" VALUE="design_1_rst_ps7_0_50M_0"/>
        <PARAMETER NAME="USE_BOARD_FLOW" VALUE="false"/>
        <PARAMETER NAME="RESET_BOARD_INTERFACE" VALUE="Custom"/>
        <PARAMETER NAME="EDK_IPTYPE" VALUE="PERIPHERAL"/>
      </PARAMETERS>
      <PORTS>
        <PORT CLKFREQUENCY="50000000" DIR="I" NAME="slowest_sync_clk" SIGIS="clk" SIGNAME="processing_system7_0_FCLK_CLK0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="FCLK_CLK0"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="ext_reset_in" SIGIS="rst" SIGNAME="processing_system7_0_FCLK_RESET0_N">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7_0" PORT="FCLK_RESET0_N"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="aux_reset_in" SIGIS="rst"/>
        <PORT DIR="I" NAME="mb_debug_sys_rst" SIGIS="rst"/>
        <PORT DIR="I" NAME="dcm_locked" SIGIS="undef"/>
        <PORT DIR="O" NAME="mb_reset" SIGIS="rst"/>
        <PORT DIR="O" LEFT="0" NAME="bus_struct_reset" RIGHT="0" SIGIS="rst"/>
        <PORT DIR="O" LEFT="0" NAME="peripheral_reset" RIGHT="0" SIGIS="rst"/>
        <PORT DIR="O" LEFT="0" NAME="interconnect_aresetn" RIGHT="0" SIGIS="rst" SIGNAME="rst_ps7_0_50M_interconnect_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="ARESETN"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="0" NAME="peripheral_aresetn" RIGHT="0" SIGIS="rst" SIGNAME="rst_ps7_0_50M_peripheral_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="S00_ARESETN"/>
            <CONNECTION INSTANCE="eig_qr_balanced_0" PORT="ap_rst_n"/>
            <CONNECTION INSTANCE="ps7_0_axi_periph" PORT="M00_ARESETN"/>
          </CONNECTIONS>
        </PORT>
      </PORTS>
      <BUSINTERFACES/>
    </MODULE>
  </MODULES>

</EDKSYSTEM>
