//***********************************************************************//  
// Required signals
//***********************************************************************//    
  wire [31:0] address;
  wire [31:0] actual_msp;
  wire [31:0] actual_psp;
  
  wire dummy_ctl_ex_last;
  wire dummy_data_abort;
  wire dummy_tbit;
  
//***********************************************************************//  
// Signals assign
//***********************************************************************//
  
  assign address    = {spy_iaex,    1'b0};
  assign actual_msp = {spy_reg_msp, 2'b00};
  assign actual_psp = {spy_reg_psp, 2'b00};
  
  assign dummy_ctl_ex_last = 1'b0;
  assign dummy_data_abort  = 1'b0;
  assign dummy_tbit        = 1'b0;
  
//***********************************************************************//  
// Interface connections
//***********************************************************************//  
  
  decoder_interface_if  arm_utils_decoder_interface_bus(
     // pragma uvmf custom decoder_interface_bus_connections begin
     .CLK            (clk_dig),
     .PORESETn       (vbg_ok),
     .opcode         (spy_opcode),
     .address        (address),
     .iaex           (spy_iaex),
     .instr_queue    (spy_instr_queue),
     .op_special     (spy_op_special),
     .op_queue_spec  (spy_op_queue_spec),
     .state          (spy_state),
     .cc_pass        (spy_cc_pass),
     .preempt        (spy_preempt),
     .atomic         (spy_atomic),
     .fault          (spy_fault),
     .hard_fault     (spy_hard_fault),
     .lockup         (spy_lockup),
     .halted         (spy_halted),
     .irq_ack        (spy_irq_ack),
     .rfe_ack        (spy_rfe_ack),
     .int_ready      (spy_int_ready),
     .int_pend_num   (spy_int_pend_num),
     .ctl_ex_last    (dummy_ctl_ex_last),
     .data_abort     (dummy_data_abort),
     .tbit           (dummy_tbit),
     .reg_r00        (spy_reg_r00),
     .reg_r01        (spy_reg_r01),
     .reg_r02        (spy_reg_r02),
     .reg_r03        (spy_reg_r03),
     .reg_r04        (spy_reg_r04),
     .reg_r05        (spy_reg_r05),
     .reg_r06        (spy_reg_r06),
     .reg_r07        (spy_reg_r07),
     .reg_r08        (spy_reg_r08),
     .reg_r09        (spy_reg_r09),
     .reg_r10        (spy_reg_r10),
     .reg_r11        (spy_reg_r11),
     .reg_r12        (spy_reg_r12),
     .reg_lr         (spy_reg_r14),
     .reg_aux        (spy_reg_aux),
     .reg_msp        (actual_msp),
     .reg_psp        (actual_psp),
     .apsr           (spy_apsr)     
     // pragma uvmf custom decoder_environment_decoder_interface_bus_connections end
     );
  interrupt_visualizer_interface_if  arm_utils_interrupt_visualizer_interface_bus(
     // pragma uvmf custom interrupt_visualizer_interface_bus_connections begin
     .CLK              (clk_dig),
     .PORESETn         (vbg_ok),
     .int_active_bit   (spy_int_actv_bit),
     .int_pend         (spy_int_pend),
     .int_irq_lvl      (spy_int_irq_lvl),
     .int_sys_tick_lvl (spy_int_tck_lvl),
     .int_svc_lvl      (spy_int_svc_lvl),
     .int_psv_lvl      (spy_int_psv_lvl),
     .int_taken        (spy_int_taken),
     .int_return       (spy_int_return)
     // pragma uvmf custom interrupt_visualizer_environment_interrupt_visualizer_interface_bus_connections end
     );
  mem_access_chk_interface_if arm_utils_mem_access_chk_interface_bus(
     // pragma uvmf custom mem_access_chk_interface_bus_connections begin
     .CLK            (clk_dig),
     .PORESETn       (vbg_ok),
     .HADDR          (HADDR)
     // pragma uvmf custom mem_access_chk_interface_bus_connections end
     );