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# encoderconf.h

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    00001 /*! \file encoderconf.h \brief Quadrature Encoder driver configuration. */
    00002 //*****************************************************************************
    00003 //
    00004 // File Name    : 'encoderconf.h'
    00005 // Title        : Quadrature Encoder driver configuration
    00006 // Author       : Pascal Stang - Copyright (C) 2003-2004
    00007 // Created      : 2003.01.26
    00008 // Revised      : 2004.06.25
    00009 // Version      : 0.2
    00010 // Target MCU   : Atmel AVR Series
    00011 // Editor Tabs  : 4
    00012 //
    00013 // The default number of encoders supported is 2 because most AVR processors
    00014 // have two external interrupts.  To use more or fewer encoders, you must do
    00015 // four things:
    00016 //
    00017 //  1. Use a processor with at least as many external interrutps as number of
    00018 //      encoders you want to have.
    00019 //  2. Set NUM_ENCODERS to the number of encoders you will use.
    00020 //  3. Comment/Uncomment the proper ENCx_SIGNAL defines for your encoders
    00021 //      (the encoders must be used sequentially, 0 then 1 then 2 then 3)
    00022 //  4. Configure the various defines so that they match your processor and
    00023 //      specific hardware.  The notes below may help.
    00024 //
    00025 //
    00026 // -------------------- NOTES --------------------
    00027 // The external interrupt pins are mapped as follows on most AVR processors:
    00028 // (90s8515, mega161, mega163, mega323, mega16, mega32, etc)
    00029 //
    00030 // INT0 -> PD2 (PORTD, pin 2)
    00031 // INT1 -> PD3 (PORTD, pin 3)
    00032 //
    00033 // The external interrupt pins on the processors mega128 and mega64 are:
    00034 //
    00035 // INT0 -> PD0 (PORTD, pin 0)
    00036 // INT1 -> PD1 (PORTD, pin 1)
    00037 // INT2 -> PD2 (PORTD, pin 2)
    00038 // INT3 -> PD3 (PORTD, pin 3)
    00039 // INT4 -> PE4 (PORTE, pin 4)
    00040 // INT5 -> PE5 (PORTE, pin 5)
    00041 // INT6 -> PE6 (PORTE, pin 6)
    00042 // INT7 -> PE7 (PORTE, pin 7)
    00043 //
    00044 // This code is distributed under the GNU Public License
    00045 //      which can be found at http://www.gnu.org/licenses/gpl.txt
    00046 //
    00047 //*****************************************************************************
    00048
    00049 #ifndef ENCODERCONF_H
    00050 #define ENCODERCONF_H
    00051
    00052 // constants/macros/typdefs
    00053
    00054 // defines for processor compatibility
    00055 // quick compatiblity for mega128, mega64
    00056 //#ifndef MCUCR
    00057 //  #define MCUCR   EICRA
    00058 //#endif
    00059
    00060 // Set the total number of encoders you wish to support
    00061 #define NUM_ENCODERS                2
    00062
    00063
    00064 // -------------------- Encoder 0 connections --------------------
    00065 // Phase A quadrature encoder output should connect to this interrupt line:
    00066 // *** NOTE: the choice of interrupt PORT, DDR, and PIN must match the external
    00067 // interrupt you are using on your processor.  Consult the External Interrupts
    00068 // section of your processor's datasheet for more information.
    00069
    00070 // Interrupt Configuration
    00071 #define ENC0_SIGNAL                 SIG_INTERRUPT0  // Interrupt signal name
    00072 #define ENC0_INT                    INT0    // matching INTx bit in GIMSK/EIMSK
    00073 #define ENC0_ICR                    MCUCR   // matching Int. Config Register (MCUCR,EICRA/B)
    00074 #define ENC0_ISCX0                  ISC00   // matching Interrupt Sense Config bit0
    00075 #define ENC0_ISCX1                  ISC01   // matching Interrupt Sense Config bit1
    00076 // PhaseA Port/Pin Configuration
    00077 // *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
    00078 #define ENC0_PHASEA_PORT            PORTD   // PhaseA port register
    00079 #define ENC0_PHASEA_DDR             DDRD    // PhaseA port direction register
    00080 #define ENC0_PHASEA_PORTIN          PIND    // PhaseA port input register
    00081 #define ENC0_PHASEA_PIN             PD2     // PhaseA port pin
    00082 // Phase B quadrature encoder output should connect to this direction line:
    00083 // *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
    00084 #define ENC0_PHASEB_PORT            PORTC   // PhaseB port register
    00085 #define ENC0_PHASEB_DDR             DDRC    // PhaseB port direction register
    00086 #define ENC0_PHASEB_PORTIN          PINC    // PhaseB port input register
    00087 #define ENC0_PHASEB_PIN             PC0     // PhaseB port pin
    00088
    00089
    00090 // -------------------- Encoder 1 connections --------------------
    00091 // Phase A quadrature encoder output should connect to this interrupt line:
    00092 // *** NOTE: the choice of interrupt pin and port must match the external
    00093 // interrupt you are using on your processor.  Consult the External Interrupts
    00094 // section of your processor's datasheet for more information.
    00095
    00096 // Interrupt Configuration
    00097 #define ENC1_SIGNAL                 SIG_INTERRUPT1  // Interrupt signal name
    00098 #define ENC1_INT                    INT1    // matching INTx bit in GIMSK/EIMSK
    00099 #define ENC1_ICR                    MCUCR   // matching Int. Config Register (MCUCR,EICRA/B)
    00100 #define ENC1_ISCX0                  ISC10   // matching Interrupt Sense Config bit0
    00101 #define ENC1_ISCX1                  ISC11   // matching Interrupt Sense Config bit1
    00102 // PhaseA Port/Pin Configuration
    00103 // *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
    00104 #define ENC1_PHASEA_PORT            PORTD   // PhaseA port register
    00105 #define ENC1_PHASEA_PORTIN          PIND    // PhaseA port input register
    00106 #define ENC1_PHASEA_DDR             DDRD    // PhaseA port direction register
    00107 #define ENC1_PHASEA_PIN             PD3     // PhaseA port pin
    00108 // Phase B quadrature encoder output should connect to this direction line:
    00109 // *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
    00110 #define ENC1_PHASEB_PORT            PORTC   // PhaseB port register
    00111 #define ENC1_PHASEB_DDR             DDRC    // PhaseB port direction register
    00112 #define ENC1_PHASEB_PORTIN          PINC    // PhaseB port input register
    00113 #define ENC1_PHASEB_PIN             PC1     // PhaseB port pin
    00114
    00115
    00116 // -------------------- Encoder 2 connections --------------------
    00117 // Phase A quadrature encoder output should connect to this interrupt line:
    00118 // *** NOTE: the choice of interrupt pin and port must match the external
    00119 // interrupt you are using on your processor.  Consult the External Interrupts
    00120 // section of your processor's datasheet for more information.
    00121
    00122 // Interrupt Configuration
    00123 //#define ENC2_SIGNAL                   SIG_INTERRUPT6  // Interrupt signal name
    00124 #define ENC2_INT                    INT6    // matching INTx bit in GIMSK/EIMSK
    00125 #define ENC2_ICR                    EICRB   // matching Int. Config Register (MCUCR,EICRA/B)
    00126 #define ENC2_ISCX0                  ISC60   // matching Interrupt Sense Config bit0
    00127 #define ENC2_ISCX1                  ISC61   // matching Interrupt Sense Config bit1
    00128 // PhaseA Port/Pin Configuration
    00129 // *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
    00130 #define ENC2_PHASEA_PORT            PORTE   // PhaseA port register
    00131 #define ENC2_PHASEA_PORTIN          PINE    // PhaseA port input register
    00132 #define ENC2_PHASEA_DDR             DDRE    // PhaseA port direction register
    00133 #define ENC2_PHASEA_PIN             PE6     // PhaseA port pin
    00134 // Phase B quadrature encoder output should connect to this direction line:
    00135 // *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
    00136 #define ENC2_PHASEB_PORT            PORTC   // PhaseB port register
    00137 #define ENC2_PHASEB_DDR             DDRC    // PhaseB port direction register
    00138 #define ENC2_PHASEB_PORTIN          PINC    // PhaseB port input register
    00139 #define ENC2_PHASEB_PIN             PC2     // PhaseB port pin
    00140
    00141
    00142 // -------------------- Encoder 3 connections --------------------
    00143 // Phase A quadrature encoder output should connect to this interrupt line:
    00144 // *** NOTE: the choice of interrupt pin and port must match the external
    00145 // interrupt you are using on your processor.  Consult the External Interrupts
    00146 // section of your processor's datasheet for more information.
    00147
    00148 // Interrupt Configuration
    00149 //#define ENC3_SIGNAL                   SIG_INTERRUPT7  // Interrupt signal name
    00150 #define ENC3_INT                    INT7    // matching INTx bit in GIMSK/EIMSK
    00151 #define ENC3_ICR                    EICRB   // matching Int. Config Register (MCUCR,EICRA/B)
    00152 #define ENC3_ISCX0                  ISC70   // matching Interrupt Sense Config bit0
    00153 #define ENC3_ISCX1                  ISC71   // matching Interrupt Sense Config bit1
    00154 // PhaseA Port/Pin Configuration
    00155 // *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
    00156 #define ENC3_PHASEA_PORT            PORTE   // PhaseA port register
    00157 #define ENC3_PHASEA_PORTIN          PINE    // PhaseA port input register
    00158 #define ENC3_PHASEA_DDR             DDRE    // PhaseA port direction register
    00159 #define ENC3_PHASEA_PIN             PE7     // PhaseA port pin
    00160 // Phase B quadrature encoder output should connect to this direction line:
    00161 // *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
    00162 #define ENC3_PHASEB_PORT            PORTC   // PhaseB port register
    00163 #define ENC3_PHASEB_DDR             DDRC    // PhaseB port direction register
    00164 #define ENC3_PHASEB_PORTIN          PINC    // PhaseB port input register
    00165 #define ENC3_PHASEB_PIN             PC3     // PhaseB port pin
    00166
    00167 #endif